10:37 <lekernel> seriously

10:37 <lekernel> verilog lets you divide strings by integers

10:38 <lekernel> the result being some large integer, maybe the ascii representation of the string divided by that integer you gave

10:38 <lekernel> yeah, it's that :)

10:41 <ysionneau> sounds like php =)

10:44 <larsc> as somebody who is dyslexic one of the most annoying 'features' of verilog is that you can use a wire without having to declare it

10:44 <lekernel> I also like how lm32 defines "parameter eba_reset = `CFG_EBA_RESET" and then alternatively uses eba_reset and `CFG_EBA_RESET in the rest of the code

10:45 <lekernel> ah, yes, that too... I think everyone has spent hours debugging something that came from that

10:46 <larsc> I wish there was something like -pedantic for iverilog

10:49 <ysionneau> ah yes, implicit wire declaration .... omg

10:49 <lekernel> seems you'd stil need a $5k verilog linter these days...

20:34 <lekernel> creotech have started testing their mixxeo boards :)

20:36 <ysionneau> :)