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<
tomeu>
the 95% pass rate makes me wonder if I should start running the 3.0 tests :)
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<
shadeslayer[m]>
<alyssa "shadeslayer: Just, you know, cle"> All fixed :)
<
tomeu>
oh, I also need a lava device-type, and the name of the DTB
<
tomeu>
shadeslayer[m]: ah, u_tiler_jobs are CPU-space addresses
<
tomeu>
tiler_jobs[] are GPU-space addresses
<
tomeu>
within the descriptors, we need to refer to other descriptors by their GPU addresses
<
tomeu>
the CPU-space addresses are just so we can write to them :)
<
paulk-leonov>
so it looks like MT8183 will come with a bifrost!
<
shadeslayer[m]>
oh
<
paulk-leonov>
(that's more chromebooks on the way)
<
shadeslayer[m]>
hm
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adjtm>
paulk-leonov, good news, one more SOC not using PowerVR!
<
adjtm>
is that new chromebook "Krane"? Do you have more info?
<
paulk-leonov>
adjtm: indeed
<
paulk-leonov>
not sure how things are going to turn out regarding RISC-V
<
paulk-leonov>
I'll probably write something about the current situation with the FSF at some point
<
paulk-leonov>
adjtm: yep looks like we have kukui and krane on the way
<
paulk-leonov>
maybe more
<
paulk-leonov>
I'm suspecting convertible / tablets
<
adjtm>
paulk-leonov, I guess that it's the only GPU IP option Sifive has got so far
<
paulk-leonov>
lkcl is working on a risc-v GPU In the meantime :p
<
paulk-leonov>
but yeah, img tech is in a bad position and RISC-V can help them survive
<
adjtm>
Imagination Technologies must have more pressure for getting customers
<
paulk-leonov>
so there's a chance RISC-V actually has some leverage
<
paulk-leonov>
we'll see :)
<
paulk-leonov>
the main issue with powervr is their hardware design though
<
paulk-leonov>
USSE and friends
<
adjtm>
I wonder if when they will release that they need an open source Linux driver
<
paulk-leonov>
they do realize it
<
paulk-leonov>
there's just no one to write it
<
paulk-leonov>
adjtm: they even released ISA docs some years ago
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<
shadeslayer[m]>
no wait, it doesn't, nvm
<
shadeslayer[m]>
maybe I need to store the first tiler job
<
shadeslayer[m]>
tomeu ^^
<
shadeslayer[m]>
alyssa: ^^ or perhaps you
<
alyssa>
shadeslayer[m]: I'm a little confused, umm
<
alyssa>
The chain goes like this:
<
alyssa>
Set Value -> Vertex -> Vertex -> Vetex -> vertex -> Tiler -> Tiler -> Tiler
<
alyssa>
I guess you have to maintain vertex and tiler linked lists separately
<
alyssa>
And link the two sets of lists at once at the end of the job before submitting
<
alyssa>
Since you don't know a priori how many jobs you'll need to link up (= which is the "last" job)
<
alyssa>
If you interleave instead, ummmmm that might also work? I think that's what Tomeu does (vs the above is what the blob does)?
<
alyssa>
The important thing is that deps are right and pointing backwards, as we found out
<
alyssa>
So each vertex jo-- yeah, that strategy might work. Not sure, it's hard for me to visualize this.
<
shadeslayer[m]>
let me think about it
<
shadeslayer[m]>
<alyssa "And link the two sets of lists a"> That's what we did before I think
<
shadeslayer[m]>
I did that to remove that code
<
alyssa>
shadeslayer[m]: Hm, right
<
narmstrong>
tomeu: I'll check if we have a public lava interface
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HdkR>
Oh nice. MT8183 with Bifrost :D
<
HdkR>
Sadly only Cortex-A73
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* urjaman
has no clue about what is being talked about really
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<
alyssa>
urjaman: LAVA is for CI.
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HdkR>
Ah, one month until the CFP for XDC ends
<
alyssa>
!remindme 29days submit proposal
<
HdkR>
Doubt I'll have Bifrost in a working state for a demo by that time
<
alyssa>
HdkR: Not even just es2tri?
<
HdkR>
You overestimate how little I get done at 10 hours a week
<
HdkR>
Takes an hour just to remember wtf I was doing
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<
HdkR>
alyssa: What does the hardware do when you have a early discard + texture fetch with derivative afterwards?
<
HdkR>
So you have a thread in the quad dead
<
HdkR>
(or all threads in the quad dead except one)