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<
HdkR>
Although your new panfrost-go-advance branch seems to compile fine
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<
tomeu>
then probably no point in looking further into this?
<
HdkR>
If I build a defconfig build of the new branch, will it be fine? :)
<
tomeu>
not sure, tbh
<
tomeu>
but it should
<
HdkR>
Neat, I'll have to test that
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* robmur01
is all too familiar with debugging nonsensical build failures due to missing brackets/parentheses/semicolons/etc.
<
daniels>
what about C++ templates?
<
robmur01>
although probably not something I should be too proud of... :D
<
HdkR>
I devote about 10 minutes every few days trying to get closer to booting panfrost on one of my GoA devices. So I'll get there eventually
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<
HdkR>
Maybe I'll be able to push this built kernel to an SD card soon
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<
alyssa>
Oh, there's a cute opt I hadn't noticed
<
alyssa>
(a + a) can run on any ALU unit, either as an add or a multiply by 2.0
<
alyssa>
and 2.0 is exactly representable in fp16 so there's no space / embedded constant / etc tradeoffs
<
urjaman>
that also means that a * 2.0 can run on any unit (as "a + a") i think then?
<
alyssa>
urjaman: Aye.
<
alyssa>
Though I think NIR optimizes a * 2.0 to a + a so we only have to handle the latter as canonical
<
alyssa>
Not sure that makes any real difference but hey
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<
alyssa>
Trying to figure out if the opt is legal wrt floating point precision
<
alyssa>
The blob does it in gles2 anyway
<
alyssa>
er gles3 even
<
urjaman>
it should i think... it's basically just a shift left by one, which in floating point is +1 to the ... part whose name i forget
<
HdkR>
That'll be a safe optimization, go for it
<
HdkR>
All overflow semantics are preserved with that optimization
<
alyssa>
HdkR: and ditto for ishl #1/imul #2/iadd I guess?
<
alyssa>
not that I have a use case
<
HdkR>
I think it is only intdiv there that has quirky semantics aroudn min/max variants :P
<
alyssa>
No shader-db changes, boring.
<
alyssa>
(where I saw the pattern was in a trex blend shader, actually)
<
alyssa>
Maybe worth going the other way though.
<
HdkR>
It's a common enough pattern that Nvidia and AMD hardware has a operand modifier for *{2.0, 4.0, 8.0}
<
HdkR>
Free scales, wee
<
alyssa>
Ooo, okay, so with the `ADD x, x -> MUL x, #2` patch alone no change in shader-db
<
alyssa>
but if I then preprocess the other way `MUL x, #2` to canonialize, we start seeing changes
<
HdkR>
Nobody needed those letters anyway
<
HdkR>
Saving bandwidth
<
mmind00>
yeah, like a crossword puzzle ;-)
<
alyssa>
y cn tlk lk ths, nd vrybdy cn stll ndrstnd y prfctly
<
alyssa>
-ENOLETTER
<
mmind00>
with Rockchip's libmali everything looks as expected :-P
<
alyssa>
Wasn't me!
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