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<Lofty>
So, a fun thing is that Quartus ships with debug symbols
<Lofty>
And debug options that let you dump the databases as ASCII text
<jopdorp>
Right
<Sarayan>
Nah, no debug symbols
<Lofty>
I mean, the function names, line numbers and line contents
<Lofty>
That's pretty close
<Sarayan>
fucklot of debug options though, and it's built as a ton of shared libs which naturally exports all the functions/methods with their real name
<jopdorp>
So how would you ho about converting them to a yosys description of the fpga?
<Lofty>
Sarayan: how's fmaker going?
<Lofty>
jopdorp: Do you see the synth_intel_alm Yosys pass?
<Sarayan>
still mucking with the routing, trying to understand the fplls, that kind of stuff
<Sarayan>
did you see that the analog pocket big fpga is a cyclone v too?