Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
<Sarayan> Ok, that's it, I understand pretty much everything but the timings
<Sarayan> now to turn all that into generated stuff, wee
<Lofty> Yay!!!
<Lofty> Timings I can handle, I think
<Sarayan> heh :-)
<Sarayan> it's a very interesting setup
<Sarayan> and in fact once you turned around the routing as being "destination muxes a number of sources" the structure pops out
<Lofty> Yeah, that makes sense