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<
Lofty>
Sarayan: lmao
<
Lofty>
Also, small announcement
<
Lofty>
Symbiotic have donated a C10GX board
<
Lofty>
Or, more specifically
<
Lofty>
*the* C10GX board
<
Lofty>
The $1200 one from Terasic
<
Lofty>
Hey, if they can afford it, why not :P
<
Sarayan>
at some point I really should buy the nano :-)
<
Lofty>
That you should
<
Sarayan>
do you know cmake?
<
Lofty>
I know enough CMake to intensely dislike it
<
Sarayan>
do you know something better than can do windows so I don't have to care about it?
<
Lofty>
Meson, I believe
<
Sarayan>
I've seen meson
<
Sarayan>
I'm... not convinced
<
Lofty>
Well, let's put this a different way
<
Lofty>
What do you actually need either for?
<
Sarayan>
compile the library, fmaker and the tools
<
Sarayan>
if it can use ninja, even better
<
Sarayan>
ok, latest version pushed
<
Sarayan>
nodetypes.ipp and cycloevd.cc are why I don't want that public yet fwiw
<
Sarayan>
also, I suspect the "PI" of "RPI" is "Physical Implementation"
<
Lofty>
Sarayan: meson uses ninja
<
Sarayan>
also, cmake looks like it's become as stardard as make, which is a point in its favor
<
Lofty>
Hope you asked WQ before inviting her :P
<
Sarayan>
Actually no, but she'll tell that she's not interested if she isn't
<
Lofty>
Wonder who else might want to be in the private repo. mwk and daveshah come to mind.
<
Sarayan>
sure, I've put you owner too so that you can add the appropriate people
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<
trabucayre>
I've the answer of my interrogation. It's a private repo. :)
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<
Lofty>
If you did, I missed it
<
Sarayan>
missed what, the fact that you're co-owner?
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<
Lofty>
[12:51:54] trabucayre: I've the answer of my interrogation. It's a private repo. :)
<
Lofty>
[14:42:37] Lofty: If you did, I missed it
<
trabucayre>
ah ok! It's for me :) In fact the answer has been done before I ask. :)
<
trabucayre>
i'm interested with prjmistral but not seen evolution in corresponding repo. This why my interrogation.
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<
awygle>
> Wonder who else might want to be in the private repo
<
awygle>
i will be unhelpful, but i am interested
<
trabucayre>
idem. But I've missed the ultimate doc: how to start...
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<
Sarayan>
altera is weird
<
Sarayan>
most of the n:1 routing is muxes, where an active link is one or two bits set
<
Sarayan>
no active link is
*all* bits set
<
daveshah>
That is very typical
<
daveshah>
Full decoding is more expensive logic wise, one hot is more expensive SRAM wise
<
daveshah>
So usually they do a tradeoff
<
Sarayan>
sure, but all
*set* for no link?
<
daveshah>
Probably to do with stopping signals floating
<
Sarayan>
would that induce a risk of short-circuit?
<
daveshah>
In the typical implementation, yes
<
Sarayan>
if two potential sources are active, for instance
<
daveshah>
Have you confirmed this happens where the sources are active?
<
Sarayan>
I'm not sure how I could do that, but otoh the code sets the bits if the link is not used, no other test there
<
daveshah>
Are you sure about that? Looking at an empty Cyclone V bitstream, it is mostly zeroes
<
Sarayan>
you have a method to generate a full empty bitstream?
<
daveshah>
Not technically empty, but it was a design containing a single wire or something
<
daveshah>
so 99.99+% of muxes should be unused
<
Sarayan>
almost empty firmware has ~355k bits set, while I have 12.7M bits of mux
<
Sarayan>
so yeah, something else is going on
<
Sarayan>
I just confirmed I have no collisions on the 12730264 bits, that's good
<
Sarayan>
(that's for the sx120f)
<
Lofty>
Since I don't know when y'all are going to sleep
<
Lofty>
Tomorrow's my birthday >.>
<
Sarayan>
mine's the 9th
<
awygle>
oh awesome
<
awygle>
what do you want for your birthday? lol
<
Sarayan>
moar fpgas! ;-)
<
Lofty>
<awygle> what do you want for your birthday? lol <--- friends /s
* awygle
glances around room=]