<cr1901_modern>
it allows latency hiding because cache access happens in parallel with MMU decoding
<cr1901_modern>
there is a potential problem with aliasing though
<ZipCPU>
I've thought of doing something similar, but its a data movement issue for me. I need to figure out how to get MMU data into the cache. (The two are separate in my current implementation.)
<cr1901_modern>
what is "aliasing"? I don't remember, I just know it's bad. :)
<ZipCPU>
Getting the physical tag in there isn't so hard, checking against the current physical tag is going to be harder.
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<cr1901_modern>
ZipCPU: I don't think your impl excludes VIPT; the MMU _is_ physically separate in VIPT.
<ZipCPU>
If that's the case, I might need to dig into it some more.
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