<therealprof[m]>
Others have other weird limitations like PLL scalers not going high enough if you pre-divide down to 1MHz.
<firefrommoonligh>
Thank you.
<firefrommoonligh>
I'm going to ditch and/or rethink HSE presets, since I'm not sure how to account for the range of possibilities
<firefrommoonligh>
Things also get messy if trying to support USB with presets, for devices that don't have a dedicated osc like HSI48 or MSI
<therealprof[m]>
There're also other clocks you'd need to hit exactly for certain peripherals. Ethernet, I2S and a few more...
<firefrommoonligh>
Good point. And varying tricks to setting them without messing with your main clock depending on family (SAI etc)
<firefrommoonligh>
That x16 limit on F3 means you can't hit its full speed without an HSE, which is surprising. Ie it uses 8Mhz HSI / 2 = 4, which with that 16x max multiplier doesn't get to 72Mhz
<firefrommoonligh>
Most HSIs are 16Mhz, and aren't forced to be divided by 2 into the PLL; F3 quirk
<therealprof[m]>
<firefrommoonligh "Most HSIs are 16Mhz, and aren't "> HSE you mean?
<therealprof[m]>
F1 is the same but that is the only reason why I listed the the 16MHz HSE. 😉
<firefrommoonligh>
Btw, Cube MX is a fantastic tool for checking out clock configs, what scalers are avail, scaler values, max speeds etc
<firefrommoonligh>
Much easier than reading RM diagrams and register tables
<firefrommoonligh>
* More intuitive than reading RM diagrams and register tables
<firefrommoonligh>
* Btw, Cube MX is a fantastic tool for checking out clock configs, what scalers and oscillators are avail, scaler values, max speeds etc
<firefrommoonligh>
And it's nice how there's a lot of convergence on modern ones. Ie L4, L5, G0, G4 are all similar. They even use the same reg values, with "reserved" ones on the ones a given MCU doesn't use
<firefrommoonligh>
Ie G0 doesn't have MSI or SAI, but leaves those PLL input srcs reserved, and keeps HSI and HSE the same values as L
<dirbaio[m]>
even on the chips with 100s of pins, EXTI can only listen on at most 16 pins at once, right?
<dirbaio[m]>
there's no magic trick to do more
<therealprof[m]>
Uhm, have you counted them?
<therealprof[m]>
EXTI works across all ports and some EXTI cover many pin numbers across all ports.
<dirbaio[m]>
there's exti0 .. exti15
<therealprof[m]>
I haven't counted them but 4x4 seems a bit low.
<dirbaio[m]>
as I undestand it there's one mux for each (?)
<dirbaio[m]>
so exti0 can only use one of PA0, PB0, PC0, PD0... at a given time
<dirbaio[m]>
same for the others, so max 16 active exti pins at a time
<dirbaio[m]>
is that correct?
<therealprof[m]>
As far as I know there're never more than 16 pins in a port.
<therealprof[m]>
Which also limits the amount of exti interrupts to 16 although usually some are combined and others not covered by EXTI at all.
<dirbaio[m]>
My question is: is there a way to use eg PA0 and PB0 at once?
<dirbaio[m]>
* My question is: is there a way to use eg PA0 and PB0 at once for exti?
<dirbaio[m]>
seems they both have to go to EXTI0
<dirbaio[m]>
so the answer is no?
<dirbaio[m]>
and is that true for all stm32s
<dirbaio[m]>
* and is that true for all stm32s?
<therealprof[m]>
Yes, the MUX configuration is exclusive to either a single port or special function.
<therealprof[m]>
I believe this is true for all STM32s but I haven't checked.
<dirbaio[m]>
👍️ thanks
<firefrommoonligh>
dirbaio you're correct
<firefrommoonligh>
When the exti0 line fires, you can poll the pins to tell which obe
<firefrommoonligh>
So don't let this limit you
<dirbaio[m]>
But only the configured pin will make the line fire right?
<firefrommoonligh>
*I'm not sure if the syscfg setting overrides this though. Might be wrong
<firefrommoonligh>
Give it a try
<firefrommoonligh>
Ie when you write the port letter's bits on syscfg.exticrX
<adamgreig-m>
Yea, exti is only one port per pin number
<adamgreig-m>
The only trick I know of is if the pin is a timer channel AF you can use the timer for input capture and thus also edge sensitive interrupt generation