<firefrommoonligh> That's some next level stuff
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<korken89[m]> Has anyone made a more "flexible" clock setup for the L series that I could have a look at? It does not make sense to have the normal "static" clock configurations that are common with the STM32 HALs when part of the idea is to have highly flexible clocking. I'm not sure what I'm looking for, mainly ideas on how to redesign the clock configuration for preferably easy and intuitive runtime changes
<korken89[m]> I have paritally been thinking about like a ref-count per clock type
<korken89[m]> And when counts go to 0, the clocks are disabled
<korken89[m]> Not sure how viable that is though
<korken89[m]> * I have paritally been thinking about like a token/ref-count per clock type
<firefrommoonligh> Not sure if this has the features you're looking for. Let me know if you have anything specific you think would help
<firefrommoonligh> I speculate you'd like functions that change clock speed (through MSI or rescaling PLL)
<adamgreig-m> korken89: maybe check out the H7 RCC, it's also quite flexible and the peripheral is more similar to newer L stuff I think
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<firefrommoonligh> How you approach this will depend on what specifically you want to do. In the meanwhile, fire away with any questions etc
<firefrommoonligh> I'd do runtime changes in the form of utility functions. Bear in mind, you'd probably also need to add utility functions to modify peripherals that rely on clock speeds you've changed, if applicable
<firefrommoonligh> * I'd handle runtime changes using utility functions. Bear in mind, you'd probably also need to add utility functions to modify peripherals that rely on clock speeds you've changed, if applicable
<thalesfragoso[m]> Is there a reason why the H7 HAL doesn't support SDSC cards ? is it a hardware limitation or library limitation ?
<thalesfragoso[m]> richardeoin: ^
<diondokter[m]> <thalesfragoso[m] "Is there a reason why the H7 HAL"> I ran into this as well. When I looked I believed it to be a library limitation
<richardeoin> iirc supporting sdsc cards just wasn't very interesting
<richardeoin> not sure I have any to test either
<thalesfragoso[m]> hmm, the F4 uses the same sdio-host library and it seems to support them
<richardeoin> it's quite possible they can be supported with some small tweaks
<thalesfragoso[m]> hmm, I might try sometime, really sad for my old throw-around 256MB card
<richardeoin> I don't expect it to be difficult to add sdsc support
<richardeoin> indeed I don't seem to have any for testing myself unfortunately
<thalesfragoso[m]> hmm, it seems to make a difference just in the block addressing, but I'm not too familiar to say for sure, I will try to patch something based on the F4 and see if it sticks
<firefrommoonligh> See if a copy+paste works. May or may not depending on how similar the periphs are
<thalesfragoso[m]> They are different
<thalesfragoso[m]> but I think I got the hold of it, let's test
<thalesfragoso[m]> Hmm, seems to be working great, even tried with embedded-sdmmc (FAT32) and was able to read a file with no problems
<thalesfragoso[m]> Will make a PR later
<thalesfragoso[m]> Next step: make it all async...
<richardeoin> thalesfragoso[m]: awesome, looking forward to the PR!
<thalesfragoso[m]> I will just do my research homework to make sure this will be the only difference for us w.r.t SDSC vs SDHC
<thalesfragoso[m]> * I will just do my research homework first to make sure this will be the only difference for us w.r.t SDSC vs SDHC
<firefrommoonligh> I'll probably steal your code
<thalesfragoso[m]> it's just like a 20 line diff from the H7 HAL to add the support for SDSC, SDHC is already supported
<thalesfragoso[m]> the async version on the other hand, will probably take some time and be quite different
<thalesfragoso[m]> I will also try to use the stm32-metapac for that
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