ChanServ changed the topic of ##yamahasynths to: Channel dedicated to questions and discussion of Yamaha FM Synthesizer internals and corresponding REing. Discussion of synthesis methods similar to the Yamaha line of chips, Sound Blasters + clones, PCM chips like RF5C68, and CD theory of operation are also on-topic. Channel logs: https://freenode.irclog.whitequark.org/~h~yamahasynths
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<cr1901_modern> ej5: Do you know of any current runs for Snoot Bopper PCBs?
<ej5> yeah someone at vogons, there's a thread
<cr1901_modern> Is it current- as in going on now? Last I checked on vogons, they ran out
<cr1901_modern> cc: Stilett0
<ej5> not sure
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<Lord_Nightmare> whitequark: when i get the keyboard, i'll desolder the main mcu and the ym2413 and send just those, and i guess scrap the rest, although if mad or plgdavid need parts i guess i can send those...
<Lord_Nightmare> not sure
<whitequark> Lord_Nightmare: ack
<cr1901_modern> It'd be nice if plgdavid logged onto IRC more than once a year :(
<Lord_Nightmare> main mcu iirc is an sdip64 HD6301X0 or HD6301Y0, i forget, i'll have to check the service manual if i can find a copy
<Lord_Nightmare> the eprom hd63701X0 and Y0 both have documented dumping modes, but iirc the mask ROM hd6301X0 and Y0 might not...
<Lord_Nightmare> i know its possible to run them in external ROM mode at least
<Lord_Nightmare> by messing the the mode pins
<Lord_Nightmare> let me ask kevtris, he did some work on this a while ago
<Lord_Nightmare> why he isn't in here, i'm not sure
<Lord_Nightmare> (iirc he may have too many channels open in his irc client)
<cr1901_modern> Lord_Nightmare: >iirc he may have too many channels open in his irc client
<cr1901_modern> Correct, not enough activity here to dedicate to a tab
<cr1901_modern> He explicitly said he was open to returning if activity picked up/someone needed his feedback
<cr1901_modern> which I mean, fine w/ me :P
<cr1901_modern> (that being said, I haven't heard a peep from him in months. Last I talked to him, his Genesis core just came out)
<Lord_Nightmare> i poked him in PM, he's around
<cr1901_modern> Thanks wq for exposing me to that abomination of a connector again :)
<Lord_Nightmare> i hope that's not real
<Lord_Nightmare> i'm praying that its not real
<Lord_Nightmare> honestly the din-5 connector with the embedded usb micro in the middle of it is actually not a terrible design
<Lord_Nightmare> since if the usb micro is standard size, you can plug a micro cable in to it
<Lord_Nightmare> or a din-5
<Lord_Nightmare> or a 'combo connector' which is both din-5 AND usb
<ej5> is that my stupid fake din5+micro usb connector rendering?
<cr1901_modern> ej5: Maaaaaaybe :)
<ej5> XD like half the people think it's serious and the other half get it
<cr1901_modern> I don't really care if it's real or fake, it burns my retinas either way :)
<ej5> lol
<Wohali> it's not real :D
<Wohali> lolol
<cr1901_modern> it doesn't matter it's not real :). I'm still scarred
<cr1901_modern> I will be filing a def not frivolous lawsuit in the near future
<Lord_Nightmare> ej5 if you'd stuck the usb micro tangent to the side rather than perpendicular, it might make slightly more sense
<Lord_Nightmare> it would still be a huge pain in the ass to use regardless :P
<ej5> yeah that would have been a bit too subtle, too many people would have believed it
<whitequark> lol
<whitequark> but if you stuck it at a tangent it'd actually be worse
<whitequark> because you don't want to route out the USB contacts to the PCB at a 90° angle
<whitequark> i guess multirow USB connectors do this anyway
<whitequark> never seen a multirow USB C though
<whitequark> only A
<TD-Linux> D+ and D- on the two unused pins
<whitequark> horrifying, and probably not impedance matched
<Lord_Nightmare> whitequark: if you stuck it BELOW the din5 connector but flat against the pcb (i.e. where the din5 key tab is) it would still line up properly with the pcb
<Lord_Nightmare> if it is a right angle mount
<whitequark> oh
<whitequark> point
<Lord_Nightmare> from a cable usability and reliability standpoint it makes the most sense to stick it in the middle of the connector though, right 'above' the key tab
<Lord_Nightmare> as long as the usb connector is the same exact length as the key slot bit and the 5 pins, it shouldn't* be easy to accidentally snap it off
<Lord_Nightmare> * this sort of assumption is problematic, since if you make something idiot proof the world will always provide a better idiot
<Lord_Nightmare> someone will inevitably try to plug it into an older device, see it doesn't fit and snap the usb part off with pliers
<Lord_Nightmare> cvsd stuff: based on datasheets from harris and the application note, my guess is one of the sf=0.4ms se=1ms VS sf=4ms se=1ms is correct, and the other is wrong, and the wrong one was just copied from datasheet to datasheet
<Lord_Nightmare> se=1ms means a ~160hz cutoff, first order, which seems awfully low for the final filter
<Lord_Nightmare> https://lib.dr.iastate.edu/cgi/viewcontent.cgi?article=6485&context=rtd pdf page 31 explains the type of CVSD which seems to be a digital version (by N.S. Jayant, who else?) of greefkes' and Jaeger's analog version (or maybe tomozawa and kaneko's system)
<Lord_Nightmare> I've seen greefkes described in literature as the 'inventor' of CVSD but i'm not sure that's technically true, it sounds like a lot of people were working on this same problem in the late 60s/early 70s
<Lord_Nightmare> jayant's digital system (which is almost exactly how i suspect the hc55516 works, except jayant's example uses 2 bits, and hc55516 uses 3, while mc3418 uses 4) uses a IIR multiplier of the previous sample, a 1-tap 1 pole filter
<Lord_Nightmare> with two constants, one for the overload case and one for the normal case
<Lord_Nightmare> let me see if i can dig up the actual references cited there, 39 (jayant) and 41,25 (cummiskey)...
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<Lord_Nightmare> 41 is an ieee publication, can be paid for at https://ieeexplore.ieee.org/document/1451414 or just use that ***-hub site and grab it anyway
<Lord_Nightmare> 25 is another ieee pub, same deal as above: https://ieeexplore.ieee.org/document/1447416/
<cr1901_modern> why are you bleeping out sci?
<whitequark> sci-hub sci-hub sci-hub
<cr1901_modern> sci is not a swear word in these circles
* cr1901_modern needs to actually go to sleep
<whitequark> pirating industrial standards and scientific research is a moral imperative
<whitequark> the same way reverse-engineering all yamaha chips to produce verilog models is
<cnomad> don't worry, he might be utilizing the streisand effect. which, as we can see, is working quite well
<whitequark> lo
<whitequark> *lol
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<whitequark> hey can someone give me some opl2 music
<cr1901_modern> oh you mean something like a .vgm file?
<cr1901_modern> Idk much about repos for opl2
<Ultrasauce> its backward compatible to opl right
<cr1901_modern> whitequark: If you're looking for legit vgm files, here's an example: https://vgmrips.net/packs/pack/tyrian-pc
<cr1901_modern> >the same way reverse-engineering all yamaha chips to produce verilog models is <-- This is some advice I can get behind :D
<Ultrasauce> i would indeed like ten YM3014 Cyclone II FPGA 8K FBGA-256 DIP-8
<cr1901_modern> What an innovative new product line- serial DAC and low I/O count FPGA in a small space-saving DIP package!
<cr1901_modern> And it's also somehow a BGA!
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<whitequark> cr1901_modern: ok, lemme correct myself slightly
<whitequark> i want the shortest register write sequence that produces *some* output
<whitequark> just to check if my gateware even works
<whitequark> also
<whitequark> why is the read strobe causing writes
<whitequark> why ... is there no VCC pin
<whitequark> only GND and VSS
<whitequark> do they even proofread these things
<fseidel> this is the chip vendor equivalent of chaining "blockchain" and "big data" in your company name
<whitequark> i don't get it
<fseidel> oh sorry, I meant the ebay listing
<whitequark> oh
<fseidel> for some reason my client didn't show your messages
<fseidel> until after you posted that next message o.O
<whitequark> do i go with the batshit insane documentation
<whitequark> or do i do something sensible
<whitequark> i put 200 ohm series resistors there i guess
<Lord_Nightmare> <cnomad> don't worry, he might be utilizing the streisand effect. which, as we can see, is working quite well <- :)
<whitequark> Lord_Nightmare: so, regarding opl2
<whitequark> or opl or opl3, they're all the same here
<whitequark> does the read strobe *really* do writes?
<Lord_Nightmare> uh. hmm. let me check the datasheet
<whitequark> the datasheet says in the truth table that it does
<whitequark> and it says in the timing diagrams that it doesn't
<Lord_Nightmare> http://map.grauw.nl/resources/sound/yamaha_ym3526.pdf <- the truth table is missing the bar over RD and WR
<Lord_Nightmare> the pins correctly have the bar
<Lord_Nightmare> /RD and /WR are active low signals
<whitequark> yes, the polarity is also wrong
<whitequark> but look at the truth table
<whitequark> RD: 1 is described as "X is written to the OPL"
<whitequark> oh
<whitequark> oh i see
<whitequark> thanks
<whitequark> the VSS pin should be VCC, right?
<Lord_Nightmare> yes
<Lord_Nightmare> i think
<Lord_Nightmare> afaik opl and opl2 have the same pinout
<whitequark> yeah
<ylamarre> Look in pin definition, it's called VCC...
<ylamarre> No more reference to Vss
<whitequark> well yes, that's still confusing
<whitequark> Lord_Nightmare: re: CS, RD, WR
<whitequark> A0 is sampled only on CS H->L, right?
<Lord_Nightmare> i figure A0 is sampled on the falling edge of /RD or /WR, but i could be wrong
<Lord_Nightmare> it might not even be sampled, but be 'live', i'm not sure
<Lord_Nightmare> ah, i see the timing diagram in figure A-2
<Lord_Nightmare> it sounds like A0 is latched by /CS H->L but this might require testing
<whitequark> ok
<whitequark> for a test, going to try cycling CS and WR together
<whitequark> each time i do a write
<whitequark> hm
<whitequark> it kinda looks like CS is ANDed with RD and WR
<Lord_Nightmare> makes sense, if cs is not asserted the bus should not be driven by the chip (/RD) and should not accept input from the bus /WR
<whitequark> oh hey
<whitequark> i got phase clock out of it
<whitequark> er
<whitequark> sample clock
<whitequark> oh hey i get a signal out
<whitequark> hm
<whitequark> can't seem to get it to change anything
<Lord_Nightmare> whitequark: quick question:
<Lord_Nightmare> is the opl2's /IRQ pin an open collector output, or is it active high/low?
<Lord_Nightmare> should be easy to check, with a meter; if it measures as low with a weak pulldown resistor when it isn't active, its open collector
<Lord_Nightmare> the datasheets stupidly do NOT specify this
<Lord_Nightmare> the OPL3 datasheet DOES specify that it is an open collector output
<Lord_Nightmare> but YM3812, YM3536 and YM2203 do not specify
<Lord_Nightmare> logically, based on the way /IRQ outputs are usually used, open collector makes the most sense
<Lord_Nightmare> since it allows a single /IRQ pin on a z80 or other cpu to be shared among multiple devices
<TD-Linux> yeah yamaha datasheets seem to be lacking in general on electrical specifications :9
<TD-Linux> couldn't figure out if ym3802-x gpio port could be left floating or not
<TD-Linux> measured it and guessed "yes"
<Lord_Nightmare> the ym2203 and ym3812 datasheets do list a "output leakage current (off)" specifically for the /IRQ pin
<Lord_Nightmare> which strongly implies that it is open collector
<whitequark> Lord_Nightmare: when it is not active (i wrote 0xe0 to register 0x04, which should have masked interrupts) it is always low
<whitequark> poking it with a meter while looking at it with a scope, in resistance mode, raises the pin slightly above ground
<whitequark> though my meter is confused
<Lord_Nightmare> that's odd, since it should be high if the irq is masked
<Lord_Nightmare> so that implies it is open collector
<Lord_Nightmare> and when it is masked/disabled, you're reading high-z
<Lord_Nightmare> if you add a pull-up resistor (something like 10k to vcc from the /irq pin) it should start acting normally
<whitequark> how do i trigger an irq? i can't seem to be able to do it
<whitequark> 2<=0x80, 3<=0x80, 4<=0x03
<Lord_Nightmare> enable one of the timers, enable timer irq, enable irq
<Lord_Nightmare> set the timer period to something reasonable
<whitequark> i think i did that
<whitequark> unsure why it doesn't work
<whitequark> hang on
<whitequark> i think it's connected right
<whitequark> Lord_Nightmare: do you have any example sequence of writes that would produce output
<whitequark> to check if everything else behaves
<Lord_Nightmare> no, not offhand
<whitequark> ican get it to produce waveforms by writing random values to random registers
<whitequark> so writes do somehow work
<whitequark> ok
<whitequark> i can read pcm from it
<Lord_Nightmare> i gotta run, i'll be back tomorrow night
<Lord_Nightmare> l8r
<whitequark> okay what the fuck
<whitequark> I think the data bit order is reversed
<TD-Linux> IBM detected
<whitequark> well that would explain why interrupts did not work
<whitequark> hrm
<ylamarre> whitequark: you to the chip or in the datasheet?
<whitequark> in the datasheet
<whitequark> i don't know. it doesn't do anything with the right bit order
<whitequark> and it does something with reverse bit order
<whitequark> since no one here can show me a sequence of operations that's *guaranteed* to produce some sound, i have no clue what's wrong
<ylamarre> I'll have to leave soon, but I'm going through midibox's code to see how they are doing...
<ylamarre> OPL3 is pretty close to OPL2, so some of the stuff should be portable...
<whitequark> is... is the DAC 2's complement?
<whitequark> looks like it is...
<TD-Linux> no it's floating point
<whitequark> no, i mean, the mantissa
<TD-Linux> oh, no idea. though the datasheet would seem to imply "no"
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<mad> I think it has -512..511 and then shifted by exponent no?