<d1b2>
<DX-MON> well, that's a first try at a JTAG pass-through probe board done for Glasgow.. strongly considering chopping off half this board and making it connect to one header only so the other is free for other adapters such as the general keyboard interface adapter I intend to build..
<d1b2>
<Attie> after feedback from electronic_eel, i'm probably going to make the CAN board a one-port addon too
<d1b2>
<Attie> a board that sits alongside, instead of on top
<d1b2>
<DX-MON> on this 25thou grid, I'm considering stopping this 25thou above center (maybe as much as 50) so the other half of the space above glasgow is free for a second board to be mounted
<d1b2>
<DX-MON> because I need to put glasgow between the keyboard JTAG link and also PS/2, I'm prefering top-mounting in my case.. but I can see along side too
<d1b2>
<Attie> sounds reasonable - don't forget that revD(?) will be getting a new connector to provide other power to the add-ons, which iirc will sit in the middle
<d1b2>
<uep> for small boards like that, it might be good to have a consistent size, and a defined spacing so there could be a little 3dprinted joiner bracket in the middle
<d1b2>
<DX-MON> ah, might be handy to know what space that connector needs
<d1b2>
<DX-MON> agreed uep
<d1b2>
<Attie> i wonder if making the board sit directly on top might be a nice idea...? use SMT 100 thou connectors on the bottom, and SMT JTAG on the top?
<d1b2>
<DX-MON> that would make routing the signals a pain, but would be very neat
<d1b2>
<Attie> ah, shame
<d1b2>
<Attie> I was thinking like this (but it's probably already clear)
<d1b2>
<DX-MON> I'm using the fact the header for Glasgow is PTH here both for mechanical stability, and as a convinient way to wrap the signals around the board in a way that shouldn't introduce extra noise at the 16MHz-ish that JTAG runs at, while providing the tapping needed
<d1b2>
<DX-MON> the pins will get seen as minimal .. I forget the word.. where you have a dag of unused copper not in the signal path that then introduces signal integrity issues
<d1b2>
<Attie> stub?
<d1b2>
<DX-MON> close enough, yes
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<d1b2>
<DX-MON> so.. after going back and forth about it in my head.. I've chopped it down
<d1b2>
<DX-MON> I think this form-factor (bottom edge is 50thou up from the center of Glasgow's expansion area) fits quite well and gives a reasonable amount of space for parts
<d1b2>
<DX-MON> for example, I can still have a PS/2 port on the other connector this way
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<d1b2>
<esden> you can put a right angle plug connector on this and stick it vertically into glasgow. That is how I would use it ...
<d1b2>
<DX-MON> ooo, that's a good way to do it too
<d1b2>
<DX-MON> for reasons of space on my desk I'm planning to use a normal vertical socket but, it's a nice assembly variant
<d1b2>
<DX-MON> aaa. I have just noticed one mistake I've made.. I should run VCC as a dedicated power net and then have the plane set to ground top and bottom for shielding/signal integrity reasons
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<cr1901_modern>
Were there ever any attempts to use Glasgow as a fx2lafw analyzer (or something like fx2lafw that's compatible w/ sigrok?)? I see an analyzer applet, but it appears optimized for debugging on-chip designs.
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<Twix>
The analyzer app can be used as "simple" logic analyzer. You can open the waveform files with sigrok/pulseview
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<marcan>
whitequark: chances of glasgow speaking USB-PD without too much pain, or should I get a FUSB302? :p
<marcan>
(the BMC version, not the horrible vbus thing)
<whitequark>
cr1901_modern: this talks about a completely unrelated feature (run --trace0
<whitequark>
marcan: zero chance, you need an analog PHY
<marcan>
lovely
<cr1901_modern>
You understand why I might be confused by the issue when it says "add a logic analyzer mode", right? :)
<whitequark>
the BMC version of PD is still batshit insane
<whitequark>
cr1901_modern: i don't understand the complaint. the issue is not referenced from anywhere and is closed...
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<cr1901_modern>
whitequark: Sorry, I'll drop it
<whitequark>
there are two relevant kinds of logic analyzers, ILA and ELA (internal and external)
<whitequark>
the issue was about an ILA, the applet implements an ELA
<marcan>
1.1V voltage swing? lol
<whitequark>
marcan: yuuuup
<marcan>
I mean it sounds like an op-amp might take care of that
<marcan>
but still, lol
<cr1901_modern>
Is it sigrok compat? If not, was there any attempts to make it sigrok compat?
<whitequark>
and 12 compliance points eye diagram for tx
<whitequark>
TWELVE
<marcan>
whitequark: I hate how all the FUSB302 breakouts ignore most of the typec pins, because why actually make them useful?
<whitequark>
and yes, you do in fact need to comply with it, it's not just for kicks
<marcan>
seriously who designs this stuff
<whitequark>
cr1901_modern: the ELA dumps a VCD file which you can load in sigrok
<whitequark>
however, you cannot directly capture with sigrok using glasgow
<cr1901_modern>
Yea, was hoping for the latter, but VCD will do...
<whitequark>
marcan: the reason the PD PHY is so evil is that they have an alternate mode where the mode is set by some resistors
<marcan>
whitequark: I hate this
<whitequark>
which mean that you need the dc-level-driven and bmc-driven signaling to coexist
<marcan>
and yes I know about the resistors
<whitequark>
so there's a very specific filter that a TI appnote tells you to design that you can use to filter out BMC signaling
<whitequark>
and the author of the appnote is the same asshole who put it in the spec
<marcan>
I get the feeling I'm going to get a FUSB302 breakout and then just jumper the CC lines to a real USB-C breakout I already have
<marcan>
why is all of this so terrible
<whitequark>
~USB fuck yeah~
<whitequark>
The Only Port You'll Ever Need
<whitequark>
terms and conditions may apply
<whitequark>
if the itching persists, see a doctor
<whitequark>
cr1901_modern: the main reason sigrok can't interface with glasgow directly is that i'm not prepared to give up control of everything that happens on USB (mostly because this would compromise the vertical integration of all components in a single python package)
<d1b2>
<mogery> universal rash bus
<whitequark>
most likely, this will eventually happen by handing over a socket to sigrok
<whitequark>
but that's quite some time from now
<marcan>
whitequark: aliexpress has full arduino-on-board breakouts for cheaper than anyone has plain fusb, lol
<cr1901_modern>
Can someone make a custom libusb interface to glasgow with sigrok that talks to fx2 exactly the way you want?
<whitequark>
cr1901_modern: i don't quite understand what you're proposing
<marcan>
unfortunately they don't break out, like *any* of the typec pins?
<whitequark>
marcan: i still do not have a single device that can usefully capture PD traffic
<whitequark>
as far as i can tell the only design in existence is made by the Chromebook folks
<marcan>
yeah that thing
<whitequark>
and they made it very hostile for manufacturing
<marcan>
I don't want to capture, I want to emulate
<whitequark>
iirc it has a transmitter as well?
<whitequark>
i want to at least capture, and the only way i'll get even that miniscule capability is once Greg sends me the boards from his redesign of the Chromebook device
<whitequark>
does it implement the PD protocol? looks like it does
<whitequark>
hm, looks like it's kind of a combined thing? it takes over some PD functions but not others
<marcan>
yeah
<whitequark>
niteresting
<whitequark>
didn't know about it, thanks for showing me
<cr1901_modern>
whitequark: I'm asking if making a sigrok driver for Glasgow is feasible
<whitequark>
cr1901_modern: ok, i see it now
<marcan>
whitequark: it's largely a PHY as far as I can tell
<marcan>
with buffering and low level state transitions and optional auto acks and such
<whitequark>
cr1901_modern: no, you cannot use libusb to talk to glasgow, because i do not and will not in foreseeable future guarantee anything about the USB interface
<whitequark>
i have broken it before and i will break it multiple times in the future
<marcan>
but it doesn't actually do any high level PD stuff
<marcan>
that's all on the host
<whitequark>
marcan: that's pretty good
<marcan>
so basically what I want
<marcan>
you do get bits to basically do everything you'd ever need on the CC pin
<marcan>
all the pullups/downs/measuring/etc
<marcan>
as well as auto "run magic state machines until you figure out wtf you're connected to" stuff
<marcan>
ordering a bunch on aliexpress
<marcan>
bare chips and that demo board, let's see what arrives firstr
<cr1901_modern>
Okay that makes your vertical integration comment (and why using a socket is feasible) crystal clear :D
<whitequark>
yup
<marcan>
the annoying thing is the timeouts are tight, so throwing this on glasgow i2c will not fly
<marcan>
there needs to be tighter coupled logic
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<marcan>
... which might mean the arduino approach is mildly less painful, as sad as that sounds
<marcan>
(boneless C compiler when?)
<egg|laptop|egg>
none compiler with left inlining?
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<d1b2>
<OmniTechnoMancer> Need boneless FORTH
<whitequark>
i feel like you could do a lot better for forth than boneless
<whitequark>
you could do j4 for example
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