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<d1b2> <Attie> @whitequark / @esden - I've not heard back from FOSDEM yet... the email seemed to imply we should hear by 24th Dec ("schedule available")
<d1b2> <Attie> they seemed keen, so i might try to make a start on some slides just in case a positive response comes in
<whitequark> Attie: maybe it went to spam or something?
<d1b2> <Attie> i've checked their online portal thing... it still says "undecided"
<whitequark> i see
<d1b2> <Attie> just checked my spam too, and no response from that email i sent the other day
<d1b2> <Attie> (they seemed to be inviting a talk on this track / "Open Source Computer Aided Modeling and Design devroom")
<_whitenotifier> [GlasgowEmbedded/glasgow] esden pushed 2 commits to revC2-readme-gerber-and-more [+22/-1/±3] https://git.io/JLM5k
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 7798322 - README: Bumped revision references.
<_whitenotifier> [GlasgowEmbedded/glasgow] esden c4cb7ec - revC2: Generated gerber, bom and renderings.
<_whitenotifier> [glasgow] esden created branch revC2-readme-gerber-and-more - https://git.io/fhhGp
<_whitenotifier> [glasgow] esden opened pull request #249: revC2: readme gerber and more - https://git.io/JLM5I
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLM5B
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLM5V
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLM5K
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLMdU
<_whitenotifier> [glasgow] esden reviewed pull request #249 commit - https://git.io/JLMdp
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLMFe
<d1b2> <esden> no raytrace
<d1b2> <esden> raytrace
<whitequark> hm
<d1b2> <esden> @whitequark which one do you prefer?
<whitequark> neither of these matches the old rendering
<whitequark> i wonder why
<d1b2> <esden> because kicad changed things
<whitequark> marcan's clearly raytraced
<d1b2> <esden> I bet
<whitequark> :/
<marcan> it is
<whitequark> ok, so the 2nd one is still better, but i still like marcan's version a lot more
<whitequark> marcan: do you recall how you made it?
<marcan> I forget if I did anything else to it
<marcan> can you give me a few hours?
<d1b2> <esden> marcan: did you change the default color settings
<marcan> I have a thing in 2h and I'm free when I get back
<d1b2> <esden> if so they need to be documented
<d1b2> <Attie> @esden that would be my guess
<whitequark> marcan: alright, i'll ping you in 2h
<marcan> I forget tbh... I don't *recall* doing that but...
<marcan> whitequark: 2h I'll still be there, more like 6h
<d1b2> <esden> as there is no way unfortunately to store the 3d rendering settings as far as I know... except within your own config on your own machine
<marcan> I remember getting renders like esden's at some point
<whitequark> ...
<whitequark> I ... guess...? let me check
<marcan> in fact I seem to recall wondering where you got the README one from
<whitequark> wtf did i *do*
<marcan> since it looked better
<marcan> (probably didn't mention it but I thought it)
<whitequark> well uh I'm glad at least there is git to keep me honest
<whitequark> let's see
<d1b2> <Attie> just got an email response from Seth re FOSDEM... they're a bit delayed, we should expect the schedule this weekend.
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<whitequark> esden: ok, i changed solder mask color to
<whitequark> er
<whitequark> to rgb(13, 104, 11)
<whitequark> which is i think "saturated green" in kicad
<whitequark> that seems about it, not quite the same result but much more pleasing
<whitequark> can you redo the renderings with that? I find the kicad 3d viewer aggravating to use and I assume you're used to it by now
<d1b2> <esden> yep that is saturated green indeed
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<d1b2> <esden> working on the new renderings and some documentation so we know what to change in the future.
<whitequark> \o/
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<_whitenotifier> [GlasgowEmbedded/glasgow] esden pushed 1 commit to revC2-readme-gerber-and-more [+3/-3/±2] https://git.io/JLMbJ
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 73426f1 - revC2: Corrected the renderings added README note.
<_whitenotifier> [glasgow] esden synchronize pull request #249: revC2: readme gerber and more - https://git.io/JLM5I
<_whitenotifier> [glasgow] esden reviewed pull request #249 commit - https://git.io/JLMbI
<whitequark> esden: the button is cropped out and there are huge empty fields on the left and right... as well as this weird black border
<whitequark> these are the aggravating parts about the 3d viewer i was referring to
<d1b2> <esden> sigh that is how kicad exports the files
<d1b2> <esden> I guess I need to make a screenshot
<whitequark> or edit the exports, yeah
<d1b2> <esden> sure... I wanted to rather crop the button out than have a massive inconsistent border on top
<d1b2> <esden> but I guess I will do more manual stuff and edit it so it looks right
<d1b2> <esden> (it will have to wait a little bit though, i need to tend to dinner first 🙂 )
<whitequark> ack
<_whitenotifier> [glasgow] whitequark reviewed pull request #249 commit - https://git.io/JLMbt
<whitequark> hey folks, i'm playing with this uh
<whitequark> model m keyboard connected to glasgow over ps/2
<whitequark> and i see constant desyncs, caused by 1-cycle (at 48M) glitches on the clock line
<whitequark> which cause a frame shift and so on and the usual consequences of that
<whitequark> (this would actually not matter for a proper applet like sensor-mouse-ps2 because that can do ps/2 tricks with the knowledge of the protocol, but it does matter critically for generic ps2-host, and in any case it's not that good to have frequent retransmits)
<whitequark> what do you think i should do? try to debug this electrically or just add an i2c like glitch filter?
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<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JLDnM
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark 774e081 - applet.interface.ps2_host: add missing guard state change.
<d1b2> <Darius> @whitequark as in the keyboard is generating glitches?
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<marcan> whitequark: are those glitches, uh, aligned with anything?
<marcan> like, if it's anywhere near an edge on the data line... that could just be crosstalk
<marcan> probably worth looking at on a scope
<marcan> but yes, if the clock rate is << the sampling clock rate, a filter is in order in general
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<whitequark> marcan: nope, not crosstalk
<whitequark> I wonder if maybe this is just line bounce, the wires are quite long
<marcan> how far from an actual edge is it?
<whitequark> it's like 0000000010111111111
<whitequark> once every 30-40 edges roughly?
<whitequark> not entirely sure if it happens on negedge as well, a bit annoying to hunt down so i haven't yet
<marcan> how long is the wire?
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<whitequark> the normal model m wire (like this https://www.clickykeyboard.com/2006/keyboard_cable/keyboard_cable-001.jpg) plus maybe 15 cm of those jumper wires
<marcan> one bit at speed of light in a wire is... what, 4 meters? so one bounce down a 2m cable but it could be multiple reflections and ground bounce and...
<d1b2> <Darius> can you look at it on a 'scope?
<marcan> yeah you probably need a filter for uncontrolled single-ended crap like this
<d1b2> <Darius> see if it is a reflection etc
<marcan> heck, maybe this should be an infrastructure feature of glasgow
<marcan> programmable debouncing of input signals
<marcan> especially since we can't control slew rates
<whitequark> at the very least i think it should be a part of common gateware
<marcan> (also see: that talk I linked, if you haven't watched it yet)
<whitequark> uh, which one?
<marcan> the one that made me want to redesign revC :p
<whitequark> ohh yeah
<whitequark> haven't watched yet
<whitequark> i will
<marcan> seriously though, whatever for revC and now I know how not to make revD worse
<marcan> but anyone involved in revE needs to watch that
<marcan> because *there* it's going to matter a lot
<whitequark> neato
<whitequark> yeah revE is still some time away
<d1b2> <Darius> can you change the drive strength in the gateware?
<whitequark> no
<d1b2> <Darius> boo
<whitequark> the keyboard is driving that signal.
<d1b2> <Darius> oh duh, yeah
<whitequark> i can't do anything about it.
<whitequark> but i also cannot change drive strength in gateware bc... we use level shifters.
<d1b2> <Darius> ah of course..
<d1b2> <Darius> I wonder if it's a long standing bug/feature of the model m!
<whitequark> but even if we didn't, ice40 doesn't let you change that anyway.
<whitequark> :p
<_whitenotifier> [GlasgowEmbedded/glasgow] esden pushed 2 commits to revC2-readme-gerber-and-more [+0/-0/±4] https://git.io/JLDgL
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 1bedd7c - revC2: Reexported and cropped renderings.
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 1c70ec7 - Revert "README: Bumped revision references."
<_whitenotifier> [glasgow] esden synchronize pull request #249: revC2: readme gerber and more - https://git.io/JLM5I
<_whitenotifier> [glasgow] esden reviewed pull request #249 commit - https://git.io/JLDgY
<_whitenotifier> [glasgow] esden reviewed pull request #249 commit - https://git.io/JLDgO
<_whitenotifier> [glasgow] esden commented on pull request #249: revC2: readme gerber and more - https://git.io/JLDg3
<_whitenotifier> [glasgow] whitequark commented on pull request #249: revC2: readme gerber and more - https://git.io/JLDgs
<_whitenotifier> [glasgow] whitequark reviewed pull request #242 commit - https://git.io/JLDgG
<_whitenotifier> [glasgow] whitequark reviewed pull request #242 commit - https://git.io/JLDgn
<_whitenotifier> [glasgow] whitequark reviewed pull request #242 commit - https://git.io/JLDgC
<whitequark> electronic_eel: finally reviewed the INA233 PR :D
<_whitenotifier> [GlasgowEmbedded/glasgow] esden pushed 1 commit to revC2-readme-gerber-and-more [+21/-0/±3] https://git.io/JLDgW
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 792427c - revC2: Generated gerber, bom and renderings.
<_whitenotifier> [glasgow] esden synchronize pull request #249: revC2: readme gerber and more - https://git.io/JLM5I
<_whitenotifier> [glasgow] whitequark closed pull request #249: revC2: readme gerber and more - https://git.io/JLM5I
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+21/-0/±3] https://git.io/JLDgB
<_whitenotifier> [GlasgowEmbedded/glasgow] esden 678b897 - revC2: Generated gerber, bom and renderings.
<_whitenotifier> [glasgow] whitequark deleted branch revC2-readme-gerber-and-more - https://git.io/fhhGp
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark deleted branch revC2-readme-gerber-and-more
<d1b2> <esden> The pictures were there, but my whole saga with all those commits made it look confusing. I am glad my squashed commit resulted in success. 🙂
<d1b2> <esden> (I really wish KiCad could render pictures in higher resolution than the screen...)
<whitequark> oh yeah... I have an unfair advantage with a hidpi laptop
<d1b2> <esden> I partly on purpose have 1080p monitors on this workstation... so that I don't make things impossibly small for my twitch streams... 😛
<d1b2> <esden> (people already squint at their phones as is 😉 )
<whitequark> right...
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+0/-0/±1] https://git.io/JLDaT
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark b269ae0 - cli: coarsen --trace VCD timestamps to 10 ns.
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark pushed 2 commits to master [+3/-1/±9] https://git.io/JLDal
<_whitenotifier> [GlasgowEmbedded/glasgow] Electronic Eel e9e6c3d - firmware: rename adc file and functions to prepare supporting the INA233 ADC too
<_whitenotifier> [GlasgowEmbedded/glasgow] Electronic Eel a18c9e6 - firmware: implement voltage reading for the INA233
<_whitenotifier> [GlasgowEmbedded/glasgow] whitequark pushed 1 commit to master [+0/-0/±4] https://git.io/JLDaV
<_whitenotifier> [GlasgowEmbedded/glasgow] Electronic Eel 9fff92d - firmware: implement initializing and reading alert limits for the INA233
<_whitenotifier> [glasgow] whitequark reviewed pull request #242 commit - https://git.io/JLDaX
<_whitenotifier> [glasgow] whitequark commented on pull request #242: Bring revC2 firmware to the same level as revC1 - https://git.io/JLDay
<sorear> very pretty
<whitequark> sorear: what is?
<sorear> oh, just glad to see there are pngs and pdfs for revC2 now
<whitequark> oh yeah
<_whitenotifier> [glasgow] whitequark reopened issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JIsgv
<_whitenotifier> [glasgow] whitequark commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDVJ
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<_whitenotifier> [glasgow] marcan commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDVP
<_whitenotifier> [glasgow] whitequark commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDVX
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<_whitenotifier> [glasgow] marcan commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDVb
<_whitenotifier> [glasgow] whitequark commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDwf
<_whitenotifier> [glasgow] marcan commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDwI
<_whitenotifier> [glasgow] whitequark commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDwm
<_whitenotifier> [glasgow] marcan commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDwB
<_whitenotifier> [glasgow] whitequark commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDwx
<_whitenotifier> [glasgow] marcan commented on issue #241: In-Use Glasgows can be interrupted by firmware reload - https://git.io/JLDrU
<_whitenotifier> [glasgow] whitequark commented on issue #165: Replace ADC with INA233 - https://git.io/JLDoJ
<_whitenotifier> [glasgow] whitequark closed issue #165: Replace ADC with INA233 - https://git.io/JecBV
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<d1b2> <davoid> congrats to the campaign. curious if there has been any work or thoughts on supporting usb-audio class device 2.0? (to I2S in/out)
<d1b2> <Attie> @davoid USB Audio Class, no... (that's not really how Glasgow works)... but I2S capture (in)? yes, it's WIP - fragile but funtional
<d1b2> <davoid> thx, agree it should be in raw form, but the fx2 could be configured to do endpoint for standard UAC2 if you ever want people to build soundcards using the platform
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<d1b2> <Attie> that would require at least new firmware for the FX2, and doesn't really align with the Glasgow project... if you'd like to do that, please feel free though!
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<d1b2> <Attie> there is already a PDM output applet, and I'd quite like to hace / do an I2S ouput applet too
<d1b2> <Attie> nothing to prevent a glasgow applet that presents a pulse audio interface or network socket for example (has been diacussed in the past)
<d1b2> <Attie> *have
<d1b2> <davoid> true true, better get the samples raw over libusb and let the applet create a virtual sound-card like you said via pulse or native coreaudio/alsa
<d1b2> <davoid> will follow your work as it might come handy!
<d1b2> <davoid> perhaps too late for the glasgow hardware itself, but I'm really missing a programmable PLL
<d1b2> <davoid> it will be hard to achieve accurate 44.100, 48.000 clocks with the current system
<d1b2> <davoid> something like a Si5351A or VersaClock would be great as an input to the ICE40
<d1b2> <Attie> iirc we can hit 48kHz dead-on, but miss 44.1kHz by a bit
<d1b2> <Attie> output is the real issue, as I2S is clocked I think we can deal with the input
<d1b2> <Attie> not a bad idea though!
<d1b2> <davoid> yes, I'm afraid the PLL in the ice is too limited 48kHz depends on the xtal precision
<d1b2> <davoid> I mean, 25 ppm will give +/- 1 Hz which isn't good enough
<d1b2> <icb> This is definitely a place I would love to see expansion. Lots of Glasgow applets could benefit from presenting a more "native" interface to work with existing software.
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<d1b2> <davoid> who should I talk to regarding a last minute change to get a PLL on the final hw?
<d1b2> <icb> Not going to happen. Feature freeze was a while ago
<d1b2> <Attie> yeah, there won't be a PLL on revC... but it's worth considering / remembering for revD / revE
<d1b2> <davoid> heh ok, where are revD things tracked?
<sorear> is revE going to be a $1000+ BOM project with everything anyone has ever asked for?
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<d1b2> <tnt> @davoid I implemented UAC on the icebreaker & fomu (with PDM output) ... nothing to do with glasgow, but if you want to plug an I2S pmod to that you can experiment with making a sound card.
<d1b2> <icb> What were you wanting the PLL attached to?
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<d1b2> <davoid> one input to the ice to allow for "any clock" frequency for blocks like I2S
<d1b2> <icb> Sounds like a good use of the SYNC connector
<d1b2> <davoid> since the small Silabs has 3 outs, one could be direct out to the headers (thru the level-shifters) ...[or via the ice if it makes more sense from a flexibility point-of-view]
<d1b2> <davoid> yep, SYNC can be used as a start, but since fairly high freq where we need stable clocks, ultimately it would sit on the same board
<d1b2> <icb> You also have the AUX and LVDS headers (though those would be blocked by the case top). The LVDS header has the benefit of being directly connected to the FPGA and a 3.3v supply pin. You would have to use gateware (or something external) to program the PLL chip, since the system I2C bus isn't brought out anywhere (except some testpoints on the back) and shouldn't really be used by add-ons anyway. SYNC has the benefit of being accessible with the case on,
<d1b2> and proper input protection, but no accessible power or extra pins for configuration.
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<d1b2> <Elon Musk> @davoid 1Hz error is plenty good for audio and should be unnoticeable
<d1b2> <Elon Musk> for usb just add a usb phy to the fpga side (USB3343, $1)
<d1b2> <davoid> heh, depends. imagine you use it for audio-testing. or simply record 1hr of audio on one board, then on another in parallel. the recordings will not have the same lenght needing post-processing / resampling = N.G.
<d1b2> <Elon Musk> that's sort of expected unless you synchronize the two boards
<d1b2> <Elon Musk> don't studio audio equipment have some sync input too?
<d1b2> <davoid> some do have word-clock in/out for syncing multiple sound cards unless you run thunderbolt or AVB daisy-chained
<d1b2> <davoid> I'd say most "high-end" sound cards, still available at $400 retail comes with built-in PLL's and will be the clock-master to the pc/mac
<d1b2> <Elon Musk> wait this thing only has 16 I/O
<d1b2> <Elon Musk> lvds pins could be used as regular I/O but it's blocked by the case
<d1b2> <davoid> oh, didn't know, cool. audio class 1.0 or 2.0? ...and would it fit on an ice40 you think?
<d1b2> <Elon Musk> si5351 is jittery though
<d1b2> <tnt> @davoid I implemented 1.0 mostly because I didn't even know there was a 2.0 when I started but ... not sure I'd even need any features of the 2.0. And yeah, fits no problem on the UP5k, I think I have like 40+% of the FPGA logic still free.
<d1b2> <davoid> yes, used it since low cost, VersaClock is better, so for a board like this (if ever adding an ultra accurate PLL, then pick one of the best of course)
<d1b2> <davoid> got it! 2.0 gives primarily lower latency (round-trip) on high speed usb which is nice. then you have more clocking options like discussed to ensure that the hw is in control (rather than a computer doing all kinds of resampling etc)
<d1b2> <Elon Musk> do what i used to do which is simply stream pcm data over virtual serial port lol
<d1b2> <Elon Musk> hw controls clocking and sample rate of course
<d1b2> <Elon Musk> i don't see how the pc's clock could ever come into play
<d1b2> <Elon Musk> pc sends data at the rate that the hw accepts it
<d1b2> <davoid> if the pc is clock master there will be resampling
<d1b2> <tnt> @davoid Ah ok, here I'm on Full Speed using a USB softcore in the fpga. But for sampling 1.0 already supports "continuous sample rate" in the descriptors.
<d1b2> <davoid> unless the soundcard has a tight pll that runs in sync with a clock control endpoint
<d1b2> <Elon Musk> @davoid that's a foreign concept to me since a pc never runs a proper RTOS and so it has no real concept of time
<d1b2> <tnt> (and I used the "asynchronous" mode of sync ... badly, the feedback value is incorrect ATM)
<d1b2> <davoid> it can be done 🙂 but mainly on macOS
<d1b2> <Elon Musk> it's not like pc software can send audio buffers at precise times to the hw
<d1b2> <Elon Musk> the sound card always dictates the timing
<d1b2> <Elon Musk> pc only fills the buffers as fast as possible
<d1b2> <davoid> we do a lot of usb sound between two ARM's in the embedded domain, i.e. one end being usb host
<d1b2> <tnt> @Elon Musk no, the sound card can lock it's internal clock to the USB SoF. That's one of the synchronization mode.
<d1b2> <Elon Musk> oh god
<d1b2> <Elon Musk> that does not sound like a good idea
<d1b2> <Elon Musk> everything on a pc is noisy and i would expect the clock to be highly jittery too
<d1b2> <tnt> The locking loop has extremely long time constants, this is to prevent long term drift.
<d1b2> <Elon Musk> right
<d1b2> <davoid> anyway, for audio-test (which I'm envisioning for glasgow or icebreaker) we'll have full control and run the capture over a standard usb cdc or similar, analysing independent from "realtime" I just found the I2S to USB-Audio use-case nice for quick-n-dirty visualisations in various audio recording software tools
<d1b2> <davoid> I use the miniDSP XMOS based bridge for this today
<d1b2> <Elon Musk> was going to say add a usb phy board externally but realized it has only 16 io
<d1b2> <icb> You don't have to use the case, or you can use the bottom by itself
<d1b2> <davoid> I'm tempted to make my own version of the glasgow board with the added stuff I need (which also includes PD phy's for basic usb-c source feature with d+/- mux and it's own INA2xx for current I really dig the configuration part of it. Just want my own form-factor which uses card-edge to connect to a "no component" pogo-pin board for use in fixtures
<d1b2> <Elon Musk> is it possible to build the glasgow board yourself and get it working or are there anticopy mechanisms
<d1b2> <icb> You can build it yourself no problem
<d1b2> <Elon Musk> oof that's gonna invite chinese clones in no time
<d1b2> <icb> Everything gets cloned, even with counterfeit protection
<jpa-> clones also expand the community in some ways, if they remain compatible enough
<d1b2> <Elon Musk> low-tier cloners aren't generally a big deal, just be careful of intentional sabotage by established, big players
<_whitenotifier> [glasgow] kevinmehall opened issue #250: Silkscreen labels swapped on SCL and SDA testpoints - https://git.io/JLyec
<d1b2> <Elon Musk> i see a ATECC chip in earlier revisions but it's gone in C2
<d1b2> <Elon Musk> i developed open source hardware until a big corporation fucked us over with dumping clones close to cost
<jpa-> which product was that?
<d1b2> <Elon Musk> nanovna v2
<d1b2> <Elon Musk> so my advice would be to leave a mechanism of last resort - something that can at least identify original devices should the need arise
<d1b2> <icb> The published files don't include the 1b2 logo, which is trademarked
<d1b2> <Elon Musk> new users who stumble upon the product won't notice or care for what logo it has
<d1b2> <icb> True, but it does help against wholesale counterfeiting. The community is happy to help troubleshoot self-made boards
<_whitenotifier> [glasgow] attie commented on issue #250: Silkscreen labels swapped on SCL and SDA testpoints - https://git.io/JLyer
<d1b2> <Elon Musk> so the clone doesn't need to use the same branding or even the same name to steal sales from you, if it's simply better value and completely compatible with your software people will buy the clone
<d1b2> <Elon Musk> ordinary cloners want to make profit themselves too so usually won't sell much cheaper than you do
<d1b2> <Elon Musk> but saboteurs definitely can
<electronic_eel> davoid: re clean clock for 44.1kHz for audio: you could use an external, super clean vcxo or whatever and feed the clock signal to glasgow via the sync header
<d1b2> <icb> Clones happen no matter what you do
<d1b2> <Elon Musk> i looked over the bom of glasgow and estimated it has a COGS margin of just over 4x, which is completely reasonable
<d1b2> <Elon Musk> but chinese can and will sell at as low as 1.2x margin and completely kill you
<electronic_eel> davoid: your clock just needs to be 3v3 cmos for it to work with the sync input
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<d1b2> <Elon Musk> @icb that's what i thought too, but i found that there's a big distinction between illegitimate clones and completely legal and legitimate clones (in the case of oshw)
<d1b2> <Elon Musk> at the end of the day it's just a matter of what you expect from the project, if it's just a hobby it's no big deal and you get to make some side money from it too,
<d1b2> <Elon Musk> but if it's to be a sustainable business model it often doesn't work
<d1b2> <Elon Musk> hackrf creator likely makes less than what an engineer at that skill level should make, while just one aliexpress hackrf seller i estimate makes $10k-20k per month
<electronic_eel> if clones flood the market, it will hurt esdens business model
<electronic_eel> but i think he dealt with clones in the past, his ice breaker was cloned (including his logo, which is trademark infringement) by some chinese mfg
<electronic_eel> i don't know if this clone has hurt his business. in the end the buyers will take a look around from where to buy and responsible buyers will most time buy through the official channel
<d1b2> <Elon Musk> if they know about the official channels that is
<electronic_eel> you won't buy a glasgow without looking at the github page first
<d1b2> <Elon Musk> i do know that most people will just hear about gadget X from a youtube video or something, then the first thing they will do is search for it on aliexpress
<d1b2> <Elon Musk> or <insert favorite ecommerce site>
<electronic_eel> hmm, don't they want to take a short look at the manual, documentation or if the project is still alive?
<d1b2> <Elon Musk> sure and since they already mentally settled on where to buy it from, they skimp over it
<d1b2> <Elon Musk> when someone searches for something on google or looks up a piece of documentation, they mentally have an intent in mind
<d1b2> <Elon Musk> usually this intent is to find something, like "what protocols does this work with"
<d1b2> <Elon Musk> that's psychology for you
<d1b2> <icb> You're assuming the choice is always between buying it from an official source, or from AliExpress. Sometimes it's between buying it from AliExpress, and not being able to afford one at all
<d1b2> <Elon Musk> so when the user already has a clear intent, they mentally filter out everything else they see
<d1b2> <Elon Musk> sure
<electronic_eel> exactly. then they are on the github readme to find out about it. and that is where we could warn about the clones and so on
<d1b2> <Elon Musk> that... is what our team ended up doing
<electronic_eel> if they really can't afford it any other way than aliexpress, yeah, maybe
<d1b2> <Elon Musk> i mean i don't care if a user buys a clone, especially if they can't/don't want to pay more for the official one
<d1b2> <Elon Musk> but what i found is a lot of users didn't know or didn't think they were getting a clone
<electronic_eel> but i think the one who you really want to discuss this with is esden, since he is the one that would take a financial loss from the clones
<d1b2> <Elon Musk> or in the most egregious case, the clone does something to improve sellability at the expense of performance (in this case metal enclosure) and then sells at cutthroat prices
<d1b2> <Elon Musk> sure
<d1b2> <Attie> iirc, the ATECC part was dropped because esden didn't care / want it... I didn't fit it on my batch, and it's had no effort put into it yet
<electronic_eel> the case is optional in the campaign. you can always order without a case or make your own
<d1b2> <Elon Musk> oh i was talking about metal case in the nanovna
<d1b2> <Attie> esden has quite a bit of experience selling things, and he's going to be the one with commercial interest in keeping the sales channel
<d1b2> <icb> Like all DRM, the ATECC chip is more likely to just punish people buying from legitimate sources, when it inevitably has an issue
<electronic_eel> the atecc wasn't designed as drm, but instead to allow the buyer to verify the source where they got their glasgow from
<d1b2> <Attie> the "glasgow project" itself is open source, so anyone can build and sell... there's nothing against that
<electronic_eel> so to enable the buyer to distinguish between a chinese clone and the original
<d1b2> <Elon Musk> right, i'm not in favor of drm, but a small console message saying this is not official hardware could be done
<d1b2> <Elon Musk> yes that
<d1b2> <Elon Musk> isn't wq the main developer on the project?
<electronic_eel> yes
<d1b2> <Elon Musk> was confused when they aren't listed on the crowdsupply page
<d1b2> <Attie> @Elon Musk - but what is "official hardware"? If I made another batch, would that count? is 1b2 the only official retailer? etc...
<d1b2> <Elon Musk> well official hardware is one that supports the original developers...
<d1b2> <icb> She didn't want to be
<electronic_eel> wq isn't very keen on closed source stuff or licenses that are not completely free as in 0-bsd
<d1b2> <Elon Musk> ah ok
<d1b2> <Elon Musk> lmao
<jpa-> verifying the source could be done just with a serial number that has some random letters at the end, and a web page with captcha to verify
<tnt> Attie: mostly I think "official" comes down to (1) don't expect 1b2 to replace faulty board he didn't produce and (2) don't email support@1b2.com with problems with boards he didn't produce. All the rest is community and not 1 board source is preferred over the other.
<tnt> As long as they are made to the specs in the repo ..
<d1b2> <Elon Musk> yeah i get it
<d1b2> <Attie> @tnt yeah - i was trying to provide an example for Elon Musk
<d1b2> <Elon Musk> funny cus i was a part of a team that had a mission statement of "intellectual communism" (it was a joke ofc)
<d1b2> <icb> No reason you can't include a signature in the serial number, but all it takes is buying one official board and setting that serial number of every one you sell
<tnt> I think the most annoying issues would be if someone made a board that was heavily cost reduced and was causing compatibility issues ...
<d1b2> <Elon Musk> but if that tweet was serious, looks like wq is the true intellectual communist here
<electronic_eel> tnt: exactly. this is why niklas fauth was asked to call his cheaper version "Edinburgh"
<jpa-> copying a single serial number on hundreds of devices is easy to detect on the "verify your device" page
<jpa-> and no need to make a fancy signature, just add a random part instead of pure sequential number
<d1b2> <Elon Musk> each fpga does have a unique identifier that can't be changed
<d1b2> <Elon Musk> not sure about lattice but xilinx has it
<electronic_eel> i think the ice40 doesn't have a unique serial
<tnt> it doesn't.
<d1b2> <Elon Musk> aww
<electronic_eel> and the other parts on the board neither
<d1b2> <Attie> huh, unexpected... the fx2 might?
<electronic_eel> no, the fx2 doesn't have one
<d1b2> <Attie> interesting
<d1b2> <icb> A proper signature could be verified offline
<electronic_eel> that was the reason behind chosing the atecc
<electronic_eel> but since it wasn't deemed important enough and would have been a lot of work to properly set up, it was dropped
<d1b2> <icb> It's not too late to add a software signature, even if the current software doesn't do anything with it. It would add a small bit of complexity to the personalization step. Obviously up to wq and esden if they would see any value or don't care
<_whitenotifier> [glasgow] electroniceel reviewed pull request #242 commit - https://git.io/JLyJR
<_whitenotifier> [glasgow] electroniceel reviewed pull request #242 commit - https://git.io/JLyJi
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<_whitenotifier> [glasgow] electroniceel reviewed pull request #242 commit - https://git.io/JLyJ9
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<_whitenotifier> [glasgow] electroniceel reviewed pull request #242 commit - https://git.io/JLyUR
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<d1b2> <j4cbo> the atecc508 also adds a somewhat annoying provisioning step to the production process
<d1b2> <j4cbo> (I build a product that has an atecc for authenticity verification... currently I’m using Atmel’s reference software stack for that but it’s a headache and a half, I need to rewrite it)
<electronic_eel> j4cbo: making the provisioning easy is part of why i wrote "and would have been a lot of work to properly set up"
<d1b2> <j4cbo> if I didn’t need to have it because of reasons, I wouldn’t have bothered
<electronic_eel> integrating it with our factory tooling would have been mandatory, using the atmel sw stack a no go
<electronic_eel> that means implementing a lot of crypto code to create a ca and sign the certs of each atecc
<electronic_eel> it was decided that the time is better spent improving the actual glasgow sw stack
<d1b2> <j4cbo> for sure
<d1b2> <icb> It looks like there's plenty of space left in the fx2 eeprom for an "authenticator" field, say a 64-byte ed25519 signature over the serial number and revision fields
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<electronic_eel> icb: and then? the clone seller could just buy 3 originals and clone them including their serials and signatures
<electronic_eel> it would be quite a lot of work to find all cloned serials and put them on some kind of blacklist
<d1b2> <icb> Yes, that's definitely something that could/would happen
<d1b2> <icb> But you could also include an "info" page that says "It looks like your board was manufactured by Foo. Check authenticity at https://..."
<d1b2> <icb> Nothing is going to be perfect. It's all a tradeoff between time, complexity, and risk
<electronic_eel> what i once saw implemented for a random no generator was putting a drop of transparent lacquer with embedded glitter particles on the pcb. then photograph all pcbs in a jig and put the photos online
<electronic_eel> no two drops of lacquer will have the same glitter pattern and reproducing one will be very hard
<d1b2> <Attie> heh, interesting approach
<electronic_eel> but if i understood esden correctly, he doesn't think that this kind of protection will pay off for him
<d1b2> <Attie> yeah... I was about to say, this is a rabbit hole that doesn't feel worth it (or was decided against by wq / esden)
<d1b2> <davoid> I wouldn't worry. I still buy the Saleae's as they're best, I like what they do, etc. yes there are clones on alixpress but I dont think they affect their biz that much
<russss> it seems to work OK for the HackRF One as well, as far as I can tell.
<russss> I definitely appreciate having a genuine Saleae when I need it.
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<Foone> I need to get one of those. I have a cheap one that works reasonably well enough but it has low sampling rate, so I can't use it to capture MDA video
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<russss> worth noting in that case that Saleae does have a pretty nice discount scheme for hobbyists/startups and it's not very obvious https://blog.saleae.com/saleae-discounts/
<d1b2> <Attie> seconded! I've shared that info quite a bit :-)
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<d1b2> <j4cbo> whoa, that is cool
<d1b2> <j4cbo> I have a previous-gen Logic 16 but I’ve been thinking of getting a Pro 8, might take them up on that...
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