azonenberg changed the topic of #homecmos to: Homebrew CMOS and MEMS foundry design | Wiki: http://homecmos.drawersteak.com/wiki/Main_Page | Repository: http://code.google.com/p/homecmos/ | Logs: http://en.qi-hardware.com/homecmos-logs/
<CoolCmos> ok thanks anyway
<CoolCmos> im not up on terminology, but i was wondering if anybody can explain the conductive layer
<CoolCmos> im also wondering about the alignment steps between layers
<CoolCmos> can anybody help me out please
<CoolCmos> have i wore out my welcome, or are people just busy
<sync> what conductive layer?
<sync> the metal layer?
<CoolCmos> yes
<sync> you just have fiducials
<sync> just like you have on every other litho layer
<CoolCmos> yes markers
<CoolCmos> tho my experience with litho is very primitive
<CoolCmos> what is the best method of etching and remval of the metal layer
<sync> lapping
<sync> as you have to get rid of the sio2 insulating it as well
<CoolCmos> my first test is going to be without a metal layer, tho upon success which im hoping for, i want to be ready to move onto metal layers to complete ciruitry
<sync> what are you trying to do?
<CoolCmos> make my first vlsi circuits
<CoolCmos> is that what yuo ment
<CoolCmos> the primary test i will just use conductive epoxy and large contact areas on the circuit to test the NPN or PNP transistors
<CoolCmos> that is more detailed
<CoolCmos> ive been working with FPGAs for years
<CoolCmos> they are too limited
<CoolCmos> i covered intro to vlsi im my coputer engineering courses
<CoolCmos> then later purchased several vlsi fab books
<CoolCmos> ive read thru them several times.. but im still in the dark in many areas
<CoolCmos> anyway thanks for the input
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