02:15 <anarsoul> MoeIcenowy: maybe we don't aligned something that must be aligned

03:21 <MoeIcenowy> anarsoul: is the tile size fixed 16x16?

03:21 <anarsoul> yes

09:45 <mardikene193> I actually did all the valid_entry calculations, and there does not appear to be a way to run kernel without restting and allowing the threads

09:46 <mardikene193> *resetting

09:47 <mardikene193> cause i did not notice that 1111... is not broadcasted to valid_entry.v into decoded_init_instr it is zerod in such case

09:57 <mardikene193> And it maybe that I am the too positive one and somewhat offering untested methods, because without multi2sim patch i can not tell, if it really can capture the fetch&decode_wfid on two consequent instructions issued

09:57 <mardikene193> it is something that multi2sim manages in miaow case what wave to run next

10:00 <mardikene193> i can only tell by simulating the instruction_arbiter.v that simd_arbiter starts from 1, while fetch arbiter starts from 0

10:04 <mardikene193> the theory could still hold, but there is nothing certain i can tell

10:05 <mardikene193> GPU vendors are trolling a little to hide that sided specs to grant this performance on graphics, there maybe some papers involved but no official documentation in that regard

10:06 <mardikene193> what i know if there is a cache miss the fetch arbiter will switch the wavefront

10:09 <mardikene193> this is in case of greedy-then-oldest, where round robin will switch in any case

10:11 <mardikene193> and i also know that this behavior is not SIMD specific, fetch arbitration is the same for VLIW too

10:13 <mardikene193> if we analyse the instr_info_table.v there is a case where graduated instruction wfid is the same as f_decode_wfid, but it is hard to tell when it happens

10:13 <mardikene193> all depends on the timing of the fetch and issue modules

10:16 <mardikene193> I just made an assumption which seems fairly logical, that this is the case where two instructions are from queues issued in parallel probably

10:17 <mardikene193> error, hell the wording was not correct, this is not the case where two instructions are issued in parallel so to speak

10:23 <mardikene193> If i am still not missing anything, then the deisgn is not perfectly deterministic

10:23 <mardikene193> anything/something

10:26 <mardikene193> What i can be missing is the multi2sim stuff, and how the fetch id's are given to the interconnect, does it have some issue latency feedback etc.

10:33 <mardikene193> https://github.com/filippo-ceid/multi2sim/blob/master/src/arch/evergreen/timing/alu-engine.c , ok it appears from those sources that it can be only deterministic if fetch queues are full

10:34 <mardikene193> /* If fetch queue is full, cannot fetch until space is made */

10:34 <mardikene193> if (compute_unit->alu_engine.fetch_queue_length >= evg_gpu_alu_engine_fetch_queue_size)

10:34 <mardikene193> return;

10:50 <rellla> enunes: i successfully built deqp but i have EGL issues when trying to run. did you exactly follow https://gitlab.freedesktop.org/mesa/mesa/tree/master/.gitlab-ci regarding building and running?

10:51 <rellla> i think i am missing a very small bit somewhere ...

11:04 <mardikene193> so yes i still figured it somewhat out, the thing with my rants is that i am more sharper in the end of the month, cause i have depot meds on.

11:04 <mardikene193> and at the end of the month those do not kick in as bad.

11:05 <mardikene193> 7years i have had those.

11:09 <mardikene193> I was earlier rambling about why the rasterizer sending the rst signal when issue queues can be consumed without it, but did another set of simulations and there is no way to consume queues after halt when reset pulse is not sent

11:11 <mardikene193> all that was a big bogus of me, meds kicked in probably as even todays thoughts are de ja vu to me, i knew it before

11:11 <mardikene193> i just kinda get lost every now and then

11:15 <mardikene193> i do not have that issue that i have genetically substances missing, and even though when i am angry without meds, 100fold less amount of meds would work, but also works for eating more properly i.e better food

11:16 <mardikene193> what you hardly get, that no one does not go angry without a reason while staying without any criminal background

11:17 <mardikene193> but it is not worth to talk about it, because the violators who did the worlds one of the biggest scams haven't probably even tried to make sense and they haven't either.

11:20 <mardikene193> so basically fetch arbitrer appears to make +1 to the issued wavefront, while on valid_entries forwarded to wavepool, this will be &'d

11:20 <mardikene193> it

11:20 <mardikene193> and it can only match if there is two subsequent instructions in flight

11:22 <mardikene193> so anyways, this is why i stated that kind of theory to begin with, it somewhat makes sense but it isn't also entirely sure

12:40 <rellla> working now. had to rebuild mesa with surfaceless platform ...

13:48 <rellla> enunes: do you have an appropriate skip-list for deqp?

14:16 <rellla> so here is the first deqp test result: http://imkreisrum.de/deqp/1/results.xml

14:19 <rellla> ...with some default skips though.

21:13 <enunes> rellla: I don't have a good skip list, by trial and error I just cut several "classes" of tests if any in that class failed

21:14 <enunes> hmm I think I ran more than you though