ChanServ changed the topic of #lima to: Development channel for open source lima driver for ARM Mali4** GPUs - Kernel has landed in mainline, userspace driver is part of mesa - Logs at https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=lima and https://freenode.irclog.whitequark.org/lima - Contact ARM for binary driver support!
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<yuq825> from the cpu side, supertuxkart spend 22.67% time on u_vbuf_get_minmax_index_mapped
<yuq825> the index buffer is write combined, so read is expensive, not mention calculate minmax every time
<yuq825> mem copy rate 2.319644 GB/s
<yuq825> gbm copy rate 0.048172 GB/s
<yuq825> read speed of gpu buffer is slow
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<anarsoul|c> yuq825: Alyssa implemented minmax caching for panfrost
<anarsoul|c> I guess we can do the same
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<yuq825> i see
<anarsoul> I'm trying to revive Connor's gpir optimization MR
<anarsoul> lima_nir_split_loads.c is broken if ssa has several successors
<anarsoul> well, several successors from different blocks
<rellla> anarsoul: thanks for looking into gpir. i'm thinking about your comment on my MR, but i didn't get it yet...
<anarsoul> dEQP-GLES2.functional.shaders.indexing.matrix_subscript.mat2_dynamic_loop_write_dynamic_read_vertex results in infinite loop :(
<anarsoul> in gpir compiler
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<anarsoul> it stucks in scheduler
<anarsoul> rellla: btw I barely understand gpir code :)
<anarsoul> it's pretty complex
<anarsoul> it ends up with 2 ld_reg that it can't schedule :\
<anarsoul> wtf
<anarsoul> rellla: we should also align it to 16*16
<anarsoul> otherwise 2nd cubemap face may have unaligned address
<rellla> anarsoul: sorry, but i still don't get it :p what should be aligned? (size * pres->array_size)?
<anarsoul> *sigh*
<anarsoul> look above
<anarsoul> find "size += actual_level_size; /* Save some memory */"
<anarsoul> note that for last mipmap level it doesn't do alignment
<anarsoul> now
<anarsoul> last mipmap level is not last anymore if array_size > 1
<rellla> yes, understand that, but why 256 and not 64?
<anarsoul> because you have to align dimensions to 16
<anarsoul> each dimension
<anarsoul> technically it will break even if array_size is 1 and you're trying to render into the last miplevel :)
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<rellla> why isn't this a problem for the !last_levels?
<anarsoul> look above
<anarsoul> in the code
<anarsoul> :)
<anarsoul> oh, layer_stride is already aligned
<anarsoul> so yeah, here you need to align it to 64
<rellla> so it should be "size += align(actual_level_size, 64); /* Don't save some memory */"
<anarsoul> oh
<anarsoul> it's actually broken for formats different from rgba8888
<anarsoul> :)
<anarsoul> it shouldn't be size += 0x0400;
<anarsoul> well
<anarsoul> it should be `else size += util_format_get_stride(pres->format, 16, 16);`
<rellla> util_format_get_stride only takes 2 arguments :)
<anarsoul> 16 * 16
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<rellla> anarsoul: seems that dEQP-GLES2.functional.default_vertex_attrib.* are all mostly flakes :(
<rellla> anarsoul: can i keep your r-b?
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