ChanServ changed the topic of #lima to: Development channel for open source lima driver for ARM Mali4** GPUs - Kernel has landed in mainline, userspace driver is part of mesa - Logs at https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=lima and https://freenode.irclog.whitequark.org/lima - Contact ARM for binary driver support!
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<anarsoul> yuq825: looks like there's some issue with reusing plb pp stream :\
<anarsoul> I get weird misrendering in X11 with it enabled
<anarsoul> but it's fixed if I call lima_generate_pp_stream() after retrieving pp_stream bo from cache
<anarsoul> OK, fixed it
<anarsoul> we also need to add fb params to pp stream key
<yuq825> I get this a bit more thinking, we are trading CPU time building pp_stream for GPU time and memory bandwidth executing tasks, a bound box pp_stream cache trade some GPU time for CPU time back because the bound box is not accurate, the problem is the bound box accuracy (we may even use a pp_stream whose bound box can cover current task's bound box)
<yuq825> that how to choose bound box
<yuq825> how to choose existing pp_stream in the cache
<yuq825> maybe a coverage rate of current task's damage area can be used to choose the pp_stream in the cache
<yuq825> not exact bound box match
<yuq825> when the rate is low, we may re-build pp_stream
<yuq825> accurately
<anarsoul> yuq825: it just gets too complicated, so I'm not sure we'll get much of out it
<yuq825> it's OK we just have accurate bound box based pp_stream cache first, we need it anyway, we may optimize it by this idea in the future
<yuq825> just remind this bound method does not only have memory trade off, also GPU time trade off
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<anarsoul> yuq825: yeah, I guess it's impossible to find perfect solution here
<anarsoul> I think bounding box should work well for desktop when usually it's a single window that gets updated
<anarsoul> yuq825: btw please merge your multi-job MR
<anarsoul> it seems to be stable and since it's quite massive and reworks a lot it would be nice to get it merged
<anarsoul> otherwise there will be conflicts with other MRs
<yuq825> ok, I'll merge your kernel fix first, then this MR
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<rellla> anarsoul: i am one step further with dEQP-GLES2.functional.depth_stencil_clear.depth_stencil_masked :)
<rellla> have to stop thinking now, but this is what i found out:
<rellla> i logged stencil values. so let's say we have 0x67 as the stencil value after the last clear, which is the last action that writes stencil values
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<rellla> https://github.com/KhronosGroup/VK-GL-CTS/blob/master/modules/gles2/functional/es2fDepthStencilClearTests.cpp#L376 does the tests and writes the value to RGBA if the test succeeds (if LEQUAL)
<rellla> so the (stencil) value i get in the resulting image is always the ndx-1 one, but it should be the ndx value instead
<rellla> i will think about that later, but maybe you have an idea in the meantime. maybe we use the wrong rsw for drawing or there is some off-by-one issue somewhere ...
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<rellla> to complete the number example: if stencil value to test again is 0x67, we test 0x46 with LEQUAL which succeeds and is written to the image
<rellla> the next is 0x55 which should also succeed, but that one and the following ones of course do not succeed or aren't written to the image as G value
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