<alyssa>
In particular for ppir, it'll allow fusing in max(x, 0.0) as a destination modifier.
<alyssa>
See patch 7+12 for destination modifiers and patch 8 for source modifiers
<alyssa>
(First 3 commits are NIR, the rest are midgard so there's a user to show the viability)
<anarsoul>
tjaalton: just add gpu node to dts?
<anarsoul>
also keep in mind that lima is render-only gpu, so you also need drm driver for your display
<anarsoul>
once you have it see kmsro, you'll have to add some glue there to bind lima and your display driver
<anarsoul>
IIRC Marex was working on some Xilinx with Mali4x0, you can ping him
<alyssa>
anarsoul: Mali4x0, the GPU that keeps on giving? :)
monstr has quit [Remote host closed the connection]
dddddd has quit [Read error: Connection reset by peer]
daniels has joined #lima
<anarsoul>
alyssa: I guess, but probably not for too long, I doubt that ARM still licenses it
<alyssa>
anarsoul: fair :)
<tjaalton>
anarsoul: ok thanks, I'll pass this on.. I don't have the hw and am just the middle-man trying to answer questions :)
<tjaalton>
there is xlnx which should handle display
<tjaalton>
the guy working on the hw gave me some dmesg dump showing "[ 3.396758] lima fd4b0000.gpu: get bus clk failed -2"
<anarsoul>
sounds like bus clock is missing in dts?
<tjaalton>
dts is..?
<tjaalton>
I've never worked with arm hw..
<tjaalton>
device tree?
<anarsoul>
yes
<tjaalton>
ah yes
<tjaalton>
that's likely
<tjaalton>
true
<tjaalton>
Marex: hi, you've got lima working on some xilinx? ^^
<Marex>
yeah
<Marex>
linux 5.4.y + backports (for the lima part)
<Marex>
I think if you use the latest stuff (the one where EEMI isn't broken, again and one more time, and then again ... ) , then you can use linux-next and it's all good
<tjaalton>
but needs xlnx for display?
<Marex>
it needs a DRM device and a small patch for mesa to make it bind with Lima
<tjaalton>
okay
<tjaalton>
is that mesa patch upstream by now?
<anarsoul>
I don't think so
<tjaalton>
where can I find it?
<Marex>
tjaalton: I have a custom display controller in the FPGA, so nowhere
<Marex>
tjaalton: but the patch is trivial ... which display controller do you use ?
<tjaalton>
xlnx
<Marex>
they have multiple
<Marex>
there should be a DRM device associtaed with that, you should be able to figure which one it is