15:26 <micken> anarsoul: I have implemented clocking now in riscos (for vop0), exact the same results as when doing it from uboot (sync correct screenmode , but no picture) so I doubt that clocking is wrong in u-boot

15:27 <micken> anarsoul: in my code it is something else

15:27 <micken> that is wrong :)

15:28 <micken> anarsoul: unless there is more than dclk and aclk

15:48 <micken> someone here can explain the relation aclk,hclk -> vop in rk3399?

15:59 <micken> anarsoul: reading the block diagram of vop for rk3288 aclk is about ,first dma control if use from axi bus

16:14 <micken> anarsoul: so if that setting is wrong , no data from mem will be transfered top vop (if I can read right)

16:14 <anarsoul> you mean aclk?

16:14 <micken> yes

16:14 <anarsoul> OK, so I guess it has to be implemented

16:15 <micken> I don't know how it works, if it (also ) should be pixelclock

16:17 <micken> but on the other thought , I don't think it changed from rk3288 , but no one knows since vop for rk3399 trm is not public :D

20:04 <micken> bah no idea how aclk is used