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<kadamski>
I'm working on mainline kernel for OrangePi PC but I'm tired of swapping cards between the board and PC, do any of you have some better setup? Is there any u-boot version that will allow me boot mainline kernel from ethernet, for example?
<apritzel>
kadamski: I think ssvb had a way of loading kernels via FEL
<kadamski>
what does it mean to load kernels via FEL?
<kadamski>
you mean the board would be an USB device ?
<apritzel>
yes, you can load U-Boot easily with this method
<apritzel>
using sunxi-fel
<kadamski>
but fel mode is implemented by some ROM or allwinners uboot ?
<apritzel>
FEL mode is in the SoC's ROM
<apritzel>
and is triggered by some condition, for instance the "update key"
<apritzel>
OPi PC does not seem to have a key for that?
<apritzel>
so then you can just try to _not_ have a uSD card in
<kadamski>
nope but wiki says it should enter FEL mode when there is no card present
<ssvb>
kadamski: you can still have rootfs on the SD card and have a bit faster boot times if you replace the bootloader on the SD card by the fel-sdboot.sunxi blob (a small stub which activates FEL mode)
<vpeter>
kadamski: Instead of taking card out of device, put it in sd card writer, writing something to it, taking out, putting back to device I made SD card mux device. SD card is connected to electronic switch (one chip) and one side of the switch is connected to usb card reader and the other to a device. Small analog switch is used to select the flow. Working great :)
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<kadamski>
ssvb: yup, I found this just before you posted this link. And yes, it's the best option for me.
<kadamski>
vpeter: neat, but I think FEL mode is even better than that and you don't need any hardware other than microUSB cable
<vpeter>
kadamski: Yes, if you have this option.
<vpeter>
But not every system who boots from sd card can do that.
<kadamski>
ah, yes, your setup is more universal
<kadamski>
but all sunxi devices can do that, right ?
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<marble_visions>
hi all, is the 1.48ghz upper limit of the a13 hardwired in some way? can i go above that (disregarding the chip wellbeing)
<marble_visions>
i tried setting the CCM_PLL1_CFG to a higher frequency, but linux reports 1.49 and am wondering if that's becasue of incorrect linux reporting or really the clock caps at that
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<ssvb>
marble_visions: 1GHz is the normal CPU clock speed of A13, with some overclocking possible to ~1.15GHz
<KotCzarny>
'this product should not be used withing 20cm of the body with the wifi/bluetooth switched on'
<KotCzarny>
he he
<marble_visions>
ssvb: yeah, i know, but can you go to more than 1.48 or not?
<marble_visions>
is it truly HW locked or linux is playing tricks on me/
<ssvb>
marble_visions: if you don't mind non-bootable system or crashing applications, then sure
<marble_visions>
nice.. so what's up with linux then? how can I make it register that the clock is more than 1.48?
<KotCzarny>
plaes, pdf with photos is quite high-res
<ssvb>
marble_visions: your system is already dead at 1.48GHz, why do you want to clock it higher?
<marble_visions>
but it's not, i am a magician :)
<ssvb>
good for you, just don't dare reporting bugs :-)
<marble_visions>
ofc
<marble_visions>
so.. any idea about linux?
<marble_visions>
i am seeing this: arch/arm/mach-sun5i/clock/ccmu/pll_cfg_tbl.c
<premoboss>
marble_visions, moveto a hardwar yhat allowmore than 1.48Ghz then.
<ssvb>
marble_visions: whats does "cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq" say?
<marble_visions>
1008000
<marble_visions>
cpufreq-info shows current CPU frequency is 1.49 GHz (asserted by call to hardware).
<ssvb>
so much for your magic...
<KotCzarny>
what is scaling max showing?
<marble_visions>
KotCzarny: 1008000 as well
<marble_visions>
so cpufreq-info is getting it's info from somewhere else
<ssvb>
as I said, you can overclock the CPU to 1.15GHz at best if you are lucky, 1.2GHz is already consistently detected as buggy on the majority of A10/A13 if you try http://linux-sunxi.org/Hardware_Reliability_Tests
<marble_visions>
thanks for the warning, i understand.
<ssvb>
but better just leave it at 1GHz and save yourself from a lot of troubles
<marble_visions>
but that's not the issue, i've taken care of that
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<premoboss>
you need liquid refrigeretor sistem to make a10 stable at more that 1.2Ghz
<premoboss>
even passive dissiparor is notenough.
<marble_visions>
beside the point
<ssvb>
nope, the transistors just can't switch fast enough regardless of the temperature
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<premoboss>
i see homemeae project for liquid dissipator ont a cubieboard1, but i did not see it on work for real.
<ssvb>
AFAIK the A10/A13 chips are using an old 55nm process
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<premoboss>
yes, 55
<marble_visions>
that's not an issue, the cpu *thinks* its running at X, but its actually not
<marble_visions>
so i need it to go higher now
<marble_visions>
"higher"
<KotCzarny>
well, do any memspeed test
<KotCzarny>
then compare without your magic tricks
<KotCzarny>
or any other cpu bench
<ssvb>
you just have some sort of a software problem in your setup or misinterpreting things
<marble_visions>
but why and how is linux get/set-ing the speed? why isn't it reading the CCM_PLL1_CFG register?
<marble_visions>
you can just say that you don't know, that's ok as well...
<ssvb>
premoboss: another "magician"? ;-)
<ssvb>
marble_visions: of course we know
<premoboss>
more or less
<KotCzarny>
isnt the whole idea of allwinner boards to have low power device?
<ssvb>
marble_visions: the kernel is just trying to protect you from doing ridiculous things, but you can easily remove the limiters and deadlock your system
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<marble_visions>
ssvb: perfect! where are the knobs to do this?
<ssvb>
marble_visions: I don't feel like helping suicidal kids, but this information is pretty easy to find
<KotCzarny>
ssvb, do it, who knows, maybe he can give you magic bullet too
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<ssvb>
KotCzarny: there is a certain group of helpless people who enjoy causing troubles to themselves and then either bother everyone by ridiculous support requests ("I *bought* the hardware, so you *must* help me") or just spread bullshit all over the place ("Allwinner is a crappy hardware")
<ssvb>
I'm not saying that marble_visions is one of them
<marble_visions>
ssvb: thanks for clarifying
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<KotCzarny>
well, if someone does a BAD THING even after warning, they shouldnt be surprised that bad things happened
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<mripard>
marble_visions: which kernel are you running, and how do you modify the clock rate ?
<marble_visions>
mripard: 3.4.104 (not mainline), writing directly to CCM_PLL1_CFG
<marble_visions>
once via a u-boot script, but the kernel later overrides that, so I write to that again from linux
<marble_visions>
mripard: i set 0xa1005f10 in 0x01c20000
<mripard>
marble_visions: the linux clock framework caches the clock values, I'm not sure what's the behaviour of the allwinner kernel
<mripard>
but it seems consistent
<ssvb>
mripard: I guess, he is probably using something like devmem2 to modify the register value
<ssvb>
otherwise he would probably just patch the kernel sources to adjust the CPU clock speed
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<mripard>
hp197: that looks great overall
<mripard>
you can send the first two as fixes
<marble_visions>
ssvb: yep. devmem2
<mripard>
and in the third, you can also change the banked version of the macro too
<mripard>
marble_visions: yeah, so there's probably a cached value somewhere
<marble_visions>
mripard: how do i clear the clock framework cache? i cant seem to find it in google
<plaes>
jemk: nice bit-optimized version
<hp197>
mripard: I'll update the 3th one accordingly this weekend
<hp197>
thanks
<marble_visions>
and does that mean that cpufreq-info reports the real clock then?
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<hp197>
first want new approval by apritzel1 for the 2nd patch set
<marble_visions>
since its the only thing that reports ~1.4ghz
<hp197>
before I submit them
<plaes>
mripard: o/
<hp197>
O7
<mripard>
marble_visions: you can't from the userspace
<mripard>
hp197: you can send the two first one right now I guess
<plaes>
do you remember why the sun4i SPI DMA patches were previously denied?
<mripard>
i don't :/
<mripard>
have you looked in the archive ?
<plaes>
I tried, but I only saw that they weren't addressed to right maintainer :P
<hp197>
mripard: No, the 2nd is a new version of the old patch. I would like to have andre a look at it before I submit it (as his name is under it as well)
<plaes>
that's why I resubmitted
<mripard>
plaes: it's probably why then :)
<plaes>
anyway.. those patches fixed my fbtft setup for sunxi
<plaes>
and that's why I sent those
<marble_visions>
mripard: alright.. i need to read up more obviously.. thanks for the info!
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<ssvb>
marble_visions: btw, isn't 0xa1005f10 in PLL1 actually setting 744MHz?