rellla changed the topic of #linux-sunxi to: Allwinner/sunxi /development discussion - did you try looking at our wiki? https://linux-sunxi.org - Don't ask to ask. Just ask and wait! - https://github.com/linux-sunxi/ - Logs at http://irclog.whitequark.org/linux-sunxi - *only registered users can talk*
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<mripard> megi: something in the crypto engine maybe?
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<montjoie> megi: the a13 in kernelci works perfectly, do you use a custom config or sunxi_defconfig ?
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<megi> I have some custom patches on top (the same ones I had in 5.9, which works on A13) and use my own config.
<megi> Maybe it's something to do with the new rng support in the crypto driver, if it's related to crypto at all
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<megi> reverting whole of crypto/allwinner to 5.9 state did not help, so it's probably not that
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<montjoie> fun they removed crypto
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<jernej> hexdump0815: yeah, I see
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<jernej> but U-Boot SPL is just a blob, so no libdram...
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<jernej> at least they used a bit newer U-Boot
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<libv> blob == gpl violation, right?
<libv> and at this point them doing single commit kernel trees is just deliberate
<libv> it's not as if it cannot be figured out what the diff is, but it's just annoying
<apritzel> montjoie: removed crypto from the DT, you mean? Because it's still in the manual ...
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<karlp> depends, do they have a written offer to provide relevant source on request?
<apritzel> karlp: that would be Xunlong to write to here, right? Since they offer the product?
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<libv> github issues?
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<libv> dmca takedown?
<libv> ;)
<jernej> libv: I don't believe blob in this case is violation - U-Boot proper is open source, while second stage loader it's AW own creation AFAIK
<libv> ok :)
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<karlp> apritzel: IMO, but IANAL, yes, posting to github _probably_ counts as distribution, and everyone who distributes needs to make the offer, they're not allowed to pass the buck, in theory. still only need to make the offer to supply though. IMO, it's _easier_ to just provide the source than to respond to requests, but... *shrugs*
<karlp> but blobs aren't automatically violations, just... often :)
<apritzel> yeah, I agree, if the whole SPL (aka boot0) is a blob, then it's "fine"
<jernej> apritzel: do you by any chance know any new documentation for Synopsys Designware DRAM PHY?
<jernej> I couldn't find anything newer than Xilinx ultrascale
<apritzel> no clue either, I am just digging in that same doc
<jernej> sadly PHY on H616 is completely different - only way forward is write magic value on magic address...
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<montjoie> apritzel: no crypto driver for CE (even if present in DT)
<apritzel> montjoie: understood, but do you expect it to be so much different from, say the H6?
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<montjoie> apritzel: I didnt expect anything, always interesting to check what they do (I pray for a magical bit which speedx10)
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<apritzel> ah yes, keep hoping ;-)
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<montjoie> such bit was found on sata:)
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<apritzel> yeah, and on the A64 MMC controller, twice even (clocks accidentally halved)
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<Ashleee> oh no, another DRAM PHY with no proper docs? :) :)
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