sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> rjo, 3.3V (both analog and digital) is also connected on the backplane
<sb0> and the 3.3V current looks OK
<sb0> and 12V is not needed for the DDS chip, and applying it does nothing anyway
<sb0> rjo, what is the current on your cards before any interaction with the FPGA?
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<sb0> whitequark, how's the compiler coming along?
<whitequark> sb0: finishing placement of host objects on the device right now
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<GitHub149> [artiq] sbourdeauducq pushed 1 new commit to master: http://git.io/vsP6L
<GitHub149> artiq/master 84b0760 Sebastien Bourdeauducq: gui: do not attempt moninj on windows
<sb0> I'm removing it
<ysionneau> I think it's no longer of any use indeed
<sb0> btw how do you build on windows? just conda build or is it a PITA?
<sb0> I assume you need visual studio and what not?
<ysionneau> for a simple package like migen or artiq it's easy
<ysionneau> you just need conda-build and do "conda build pkg"
<ysionneau> as soon as you need to compile C code you need horribly big visual studio
<ysionneau> I think I will be able soon to autobuild windows packages also (I have some server running windows in the cloudy cloud)
<sb0> appveyor?
<ysionneau> nop a real server where i'm admin etc
<ysionneau> running in a datacenter in a friend's cloud
<ysionneau> in the same "cloud" as the VM which is currently doing the automated builds for linux-32
<ysionneau> https://github.com/m-labs/artiq/blob/master/conda/artiq/build.sh#L10 < this ARTIQ_GUI=1 is also no longer useful
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* ysionneau building llvm-or1k on win64
<ysionneau> hey _florent_ !
<_florent_> hi ysionneau
<_florent_> I hope your holidays were fine :) Not too much work on ARTIQ?
<ysionneau> holidays were really cool, visited Japan, Belgium and Dusseldorf/Köln in Germany
<_florent_> (I'm not often here since I'm working on others things... that takes lots of time...)
<_florent_> ah nice!
<ysionneau> for now I do lots of packaging stuff and automating the artiq pkg builds on different platforms
<ysionneau> I saw you worked on mithro 's board, very cool!
<_florent_> yes, but in fact for now lots of things in the firmware come from Mixxeo
<_florent_> it's basically Mixxeo + a JPEG Encoder + Ua SB or Ethernet streamer (and YCbCr conversion to optimize DDR bandwidth)
<_florent_> Ua SB/a USB
<ysionneau> I'm wondering in fact why not using Mixxeo
<ysionneau> what's on this board on top of what Mixxeo already has?
<_florent_> I think mithro already started working on that board before being aware of Mixxeo
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<travis-ci> m-labs/artiq#434 (master - 84b0760 : Sebastien Bourdeauducq): The build passed.
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<_florent_> And I'm not sure Mixxeo HDMI port can be use as output, here you have 2 input / 2 outputs, and there is also the FX2 USB
<_florent_> Ah and there is also Display Port input and output (which required a spartan6 LXT)
<ysionneau> ah I was gonna ask how can it do more input/output than the Mixxeo
<ysionneau> what's the difference with the LXT version?
<_florent_> it has transceivers
<ysionneau> more serdes? more pll?
<_florent_> only 4 PLL, same as the LX, that's too bad
<_florent_> I'm already using the 4 PLL with 2 HDMI in and 2 HDMI out, so I think we will not be able to support all ports with a single firmware
<ysionneau> how is the original non-migen based firmware handling this?
<_florent_> Display Port is not implemented in the non-migen based firmware
<ysionneau> ok
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<sb0> ysionneau, do we need to bother with win64? if it can run the win32 packages just fine, then no.
<sb0> just close the win64 issue if the win32 packages work
<ysionneau> ok let me check that
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<sb0> _florent_, don't you need a 5th PLL for the SDRAM?
<_florent_> Yes, I had to share the clocking for the 2 HDMI out (not an issue since we are using the same video mode on the 2 outputs)
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<sb0> ²³¼½¬½¬¼¼!! qt
<sb0> why is it completely different to set column auto-resize for QTableView and for QTreeWidget
<sb0> ah, not completely.
<cr1901_modern> _florent_: LiteScope's EdgeDetectorUnit is broken for me, complaining that "Buffer doesn't have a sink attribute". can you confirm?
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<GitHub146> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/vs1YQ
<GitHub146> misoc/master da25367 Florent Kermarrec: litescope/core/port: fix LiteScopeEdgeDetector (refactoring issues)
<_florent_> cr1901_modern: yes sorry (untested since refactoring), it should be better
<cr1901_modern> _florent_: No problem. After I learn the codebase a bit more, I am willing to add some documentation. I think litescope's an important tool to prevent/reduce frustration.
<GitHub147> [misoc] enjoy-digital force-pushed master from da25367 to fd31e6a: http://git.io/LjONPA
<GitHub147> misoc/master fd31e6a Florent Kermarrec: litescope/core/port: fix LiteScopeEdgeDetector (refactoring issues)
<_florent_> I'm mostly using simple Term, so if you find issues with EdgeDetector please report it
<cr1901_modern> Sure. One thing I don't get about term is: You can place an arbitrary string like "term" into configure_term, and litescope will happily run >>
<cr1901_modern> when it seems the "proper" string expected is a product of maxterms or sum of minterms
<cr1901_modern> Ie "A & B & C | D" (when all my signal names follow a pattern of ttl_[0-9]+)
<_florent_> in fact this is only useful when you have multiple triggering using, for example: "term | (edge_detector & range_detector)"
<cr1901_modern> AFAICT, "term" just "unconditionally captures data when the litescope driver writes a request to the SoC". Is this correct?
<_florent_> You can have multiple detector, for example detector A, B, C. Each detector will have the same signals on its input, but are not necessary the sames (Term, RangeDetector, EdgeDetector) or programmed the same way.
<_florent_> So you have a LiteScopeSum after the detector that generates a hit signal from the hit signals from all the detector, and it's lookup table that we have to program
<_florent_> but you also have to program each detector individually
<_florent_> here, if you only have 1 detector, you will only program the LUT with 0->0, 1-1 which is what "term" does
<_florent_> you will program the CSRs of the EdgeDetector to configure your trigger
<cr1901_modern> Okay, I followed most of that: We have multiple detectors that we can chain together
<cr1901_modern> Some of the detectors are programmable, some are not
<cr1901_modern> (term isn't, unless I misunderstand)
<_florent_> in fact all the detectors are programmable
<_florent_> LiteScopeTerm has 2 CSRS: trig and mask
<cr1901_modern> mask, presumably, is a bitmask for channels
<_florent_> the hit equation is: source.hit.eq((sink.data & self.mask) == self.trig)
<cr1901_modern> So, if I wanted to capture when channel 0, out of 8 channels, went low, I'd set mask to 0x01 and trig to 0x00?
<cr1901_modern> or sorry trig to 0xFE*
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<cr1901_modern> (that way no other channels cause a hit)
<_florent_> channel0: mask to 0x01 and trig to 0x01
<_florent_> channel1: mask to 0x02 and trig to 0x02
<cr1901_modern> Oh! and channel 0 and 1, mask to 0x03 and trig to 0x03 (if I want both of them high before capture starts)
<_florent_> ah sorry not, miss-read, you were right, what I wrote was for triggering when channelx went high
<cr1901_modern> Unfortunately, the victim chip I'm trying to analyze is active low
<cr1901_modern> Awesome! Just capture my first legit waveform with Litescope XD
<_florent_> with EdgeDetector or Term?
<cr1901_modern> Term
<cr1901_modern> the first sample is wrong (it's high when my term is active low), but I think I had issues with that previously
<cr1901_modern> I also just conveniently answered one of my other questions too (what does offset do?) by viewing the waveform.
<_florent_> yes, sometimes you want to be able to see what happened before your trigger, offset can be used for that. (offset of 128 means you will be able to visualize 128 cycles before your trigger)
<cr1901_modern> Very useful in my case to get setup times for other signals
<GitHub114> [artiq] sbourdeauducq pushed 9 new commits to master: http://git.io/vs1ra
<GitHub114> artiq/master 45a90bf Sebastien Bourdeauducq: conda: remove stale ARTIQ_GUI env variable
<GitHub114> artiq/master 7d4d92e Sebastien Bourdeauducq: gui/explorer: use QTreeWidget for argument editor
<GitHub114> artiq/master bb228b0 Sebastien Bourdeauducq: gui,language,master: argument groups
<cr1901_modern> The edge detector keeps saying there is a hit AFTER the clock cycle where the edge was detected, right?
<cr1901_modern> I.e. if I do la.configure_sum("term & edge_detector"), the "term" hit can follow a few cycles after the edge hit?
<_florent_> both Term and EdgeDetector are asynchronous, so they should generate their hit signal at the same time
<cr1901_modern> okay, wanted to make sure
<rjo> sb0: you said the output is 0. the output needs 12V iirc.
<rjo> sb0: on the current you should ask joe or daniel.
<sb0> rjo, yes, for the amp, but it's also 0 directly at the output of the DDS chip, and it's still 0 with 12V applied
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<cr1901_modern> _florent_: Testing/building edge detector scope now
<_florent_> ok
<sb0> rjo, the other symptoms (insufficient current on 1.8V and no SYNC_OUT) also point to a problem at the DDS chip level
<rjo> yeah. nobody ever bothers to test the dds boards let alone send the fab hous some setup to have them test it. could well be broken boards/open connections.
<cr1901_modern> _florent_: 'LiteScopeLADriver' object has no attribute 'trigger_port0_rising_mask'. Forgot to change register names? :P
<cr1901_modern> (the register is called trigger_port0_rising, trigger_port0_falling, trigger_port0_both)
<cr1901_modern> wait nevermind, ignore me
<cr1901_modern> I didn't assign the edge detector to the right port
<_florent_> yes, but you are probably right about the missing _mask, I'm fixing that
<GitHub47> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/vs1QF
<GitHub47> misoc/master 27b1dd7 Florent Kermarrec: litescope/core/port: fix EdgeDetector CSRs names
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<travis-ci> m-labs/artiq#435 (master - d5f2f5c : Sebastien Bourdeauducq): The build passed.
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<GitHub29> [misoc] enjoy-digital pushed 1 new commit to master: http://git.io/vsMJn
<GitHub29> misoc/master e91ce85 Florent Kermarrec: litescope/core/port: fix missing self.comb...
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<ysionneau> sb0: I was able to run the GUI + master and run the Floppy F simulation on win64 using the win32 package (you just need to install miniconda 32bit instead of the 64 bit)
<ysionneau> the pyqtgraph was working
<ysionneau> I didn't try llvmlite-artiq yet
<ysionneau> and I've set up automated builds for win32 :) let see at the next commit if it works fine
<ysionneau> after a bit more testing I'll update the manual and the github issue
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<rjo> ysionneau: what do you need automated builds for?
<rjo> ... on windows. artiq is noarch.
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