sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
<GitHub111> [artiq] whitequark pushed 1 new commit to master: https://git.io/v1ld0
<GitHub44> [artiq] whitequark closed issue #632: TList() type annotations for kernels broken https://git.io/v1qbe
<GitHub111> artiq/master b5a6848 whitequark: compiler: fix parsing of TList annotations (fixes #632).
<GitHub19> [artiq] whitequark opened issue #637: Memory corruption in lwIP https://git.io/v1ldy
<GitHub9> [artiq] whitequark closed issue #598: [phaser] kernels freeze https://git.io/v1ldH
<GitHub8> [artiq] whitequark commented on issue #598: This is a manifestation of #637, let's discuss it there. https://git.io/v1ld9
<GitHub9> [artiq] whitequark commented on issue #631: The remaining bug is a manifestation of #637, let's discuss it there. https://git.io/v1ldQ
<GitHub155> [artiq] whitequark closed issue #631: Communication with core device fails https://git.io/v1tPI
<GitHub135> [artiq] whitequark commented on issue #570: @jordens Is there any discussion yet to happen here? https://git.io/v1ldd
<GitHub105> [artiq] whitequark commented on issue #637: For now the roadmap is as follows:... https://git.io/v1ldp
<bb-m-labs> build #245 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/245
<GitHub13> [artiq] whitequark commented on issue #637: The reproduction steps we have:... https://git.io/v1lF0
<bb-m-labs> build #1141 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1141 blamelist: whitequark <whitequark@whitequark.org>
<GitHub71> [artiq] whitequark commented on issue #637: The reproduction steps we have:... https://git.io/v1lF0
<GitHub8> [artiq] klickverbot commented on issue #637: From working with embedded lwIP on the Zynq before, I'd be inclined to triple-check that the assumptions made by its API are followed (e.g. w.r.t. send buffer lifetimes and the copying flags). The lifetime mechanics are sometimes poorly documented to the point where they could be called buggy under a less charitable interpretation.... https://git.io/v1lFA
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<GitHub109> [artiq] whitequark commented on issue #637: > I'd be inclined to triple-check that the assumptions made by its API are followed (e.g. w.r.t. send buffer lifetimes and the copying flags).... https://git.io/v1lbk
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<GitHub146> [artiq] whitequark pushed 1 new commit to master: https://git.io/v1lNI
<GitHub146> artiq/master 4c94873 whitequark: runtime: upgrade lwip to release 2.0.0.
<bb-m-labs> build #1142 of artiq is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1142 blamelist: whitequark <whitequark@whitequark.org>
<GitHub152> [artiq] sbourdeauducq commented on commit 4c94873: What is that for? https://git.io/v1lNY
<GitHub58> [artiq] whitequark commented on commit 4c94873: You have `-Wmissing-prototypes` enabled somewhere, I'm not sure for what reason. The warnings are useful when upgrading lwip because they remove APIs aggressively, and this missing prototype warning reduces SNR. https://git.io/v1lNC
<whitequark> rjo: I salvaged the approach I used earlier for casts.
<GitHub117> [artiq] whitequark pushed 1 new commit to master: https://git.io/v1lNl
<GitHub117> artiq/master 4305903 whitequark: compiler: rein in overzealous cast monomorphization....
<whitequark> was a rather trivial problem
<bb-m-labs> build #1143 of artiq is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1143 blamelist: whitequark <whitequark@whitequark.org>
<GitHub58> [artiq] sbourdeauducq commented on commit 4c94873: Then shouldn't we have those functions ``static``, or their prototypes moved to a header file? https://git.io/v1lNR
<bb-m-labs> build #1144 of artiq is complete: Failure [failed lit_test] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1144 blamelist: whitequark <whitequark@whitequark.org>
<GitHub199> [artiq] whitequark commented on commit 4c94873: These functions are only used from Rust. It doesn't make any real sense to declare them in a header file, except to make changing their prototype more noisy. https://git.io/v1lNo
<GitHub87> [artiq] sbourdeauducq commented on commit 4c94873: OK so this is a Rust problem. In this case we should just drop ``-Wmissing-prototypes``. https://git.io/v1lNy
<whitequark> hm, wait, that wasnt legal
<GitHub79> [artiq] whitequark pushed 2 new commits to master: https://git.io/v1lAW
<GitHub79> artiq/master 218720c whitequark: Revert "compiler: rein in overzealous cast monomorphization."...
<GitHub79> artiq/master f68e4ae whitequark: compiler: rein in overzealous cast monomorphization.
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<bb-m-labs> build #246 of artiq-board is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/246 blamelist: whitequark <whitequark@whitequark.org>
<bb-m-labs> build #1145 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1145 blamelist: whitequark <whitequark@whitequark.org>
<whitequark> ??? error: no such remote ref 216bf89491815029aa15463a18744afa04df58fe
<sb0> whitequark, yes, had the same issue when i tried upgrading to 2.0
<sb0> did you get all the branches?
<whitequark> I pushed the tag
<whitequark> and it actually checked out the submodules on the artiq builder
<whitequark> bb-m-labs: force build artiq
<bb-m-labs> build #1146 forced
<bb-m-labs> I'll give a shout when the build finishes
<GitHub181> [artiq] whitequark pushed 1 new commit to master: https://git.io/v1lAx
<GitHub181> artiq/master 668928a whitequark: runtime: fix a lifetime issue in lwip::Pbuf....
<whitequark> hrm, test_pulse_rate_dds passes after 668928a
<whitequark> so that could have been the rust binding issue after all...
<whitequark> let's see if that fixes the other obscure crashes too.
<GitHub33> [artiq] whitequark commented on issue #637: I've fixed a lifetime issue (interestingly, on the Rust side exclusively) in 668928a, let's see if that helps. https://git.io/v1lAj
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<bb-m-labs> build #247 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/247
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<bb-m-labs> build #1146 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1146
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<bb-m-labs> build #248 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/248
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<bb-m-labs> build #1147 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1147 blamelist: whitequark <whitequark@whitequark.org>
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<GitHub38> [artiq] jordens commented on issue #570: No. We just have to dig up all the contributors and have them signal consent. https://git.io/v18Iz
<cr1901_modern> sb0: I fixed *a* bug in the SPI core. I am fairly confident this will close #615, but because I couldn't duplicate jmizrahi's results exactly, I'm holding off on saying "#615 can be closed for sure". Also, I broke one of the core's unit tests (I know why it broke), and I want to discuss before making final changes.
<cr1901_modern> Ehhh, I fixed the unit test, but at the cost of making data valid one system clock cycle later than before my changes. If this is a dealbreaker, I have a few options. We can talk later.
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<GitHub118> [artiq] sbourdeauducq pushed 7 new commits to master: https://git.io/v18Y4
<GitHub118> artiq/master a583476 Sebastien Bourdeauducq: rtio: more DMA fixes, better stopping mechanism
<GitHub118> artiq/master 30bce5a Sebastien Bourdeauducq: rtio: DMA fixes
<GitHub118> artiq/master 74fe5c3 Sebastien Bourdeauducq: test: make gateware simulations discoverable
<bb-m-labs> build #249 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/249 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #1148 of artiq is complete: Failure [failed] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1148 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub111> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v18Os
<GitHub111> artiq/master c413d95 Sebastien Bourdeauducq: rtio: fix DMA get_csrs
<bb-m-labs> build #250 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/250
<sb0> cr1901_modern, okay, post your results/patch into the issue?
<sb0> the DMA core seems OK in simulation. whitequark do you want to write the runtime part after you're done with the network bugs?
<rjo> whitequark: ack
<bb-m-labs> build #1149 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1149 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<GitHub38> [artiq] cr1901 commented on issue #615: @jmizrahi Okay, the following patches to MiSoC and ARTIQ should (hopefully) fix your issue:... https://git.io/v18co
<cr1901_modern> I made a patch as a gist.
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<whitequark> sb0: ok
<GitHub169> [artiq] whitequark commented on issue #637: 668928a has not fixed anything (more or less as I expected; the code in sched.rs was mildly suspicious but ultimately it did the same thing). https://git.io/v185H
<sb0> whitequark, there's gradator on #electrolab who seems knowledgeable about lwip.
<whitequark> ok...
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<whitequark> sb0: looks like the TMPU doesn't work properly
<whitequark> it does seem to trap on write transactions but not read transactions
<sb0> it ignores the write bit, so that would be a mor1kx problem
<whitequark> sigh
<whitequark> that makes it rather useless
<whitequark> wonder if mor1kx can be fixed... but not now at least
<GitHub172> [artiq] whitequark commented on issue #544: mor1kx ignores wb.err on read cycles, so looks like this will not work so easily. https://git.io/v18h4
<GitHub119> [artiq] whitequark commented on issue #637: > Integrate the trivial MPU and become really sure that Rust code is not clobbering lwIP by accident with its stacks (as the method I used to check before now is unreliable).... https://git.io/v18jf
<GitHub175> [artiq] whitequark commented on issue #637: I've tried always copying input data in the call to tcp_write. This did not improve anything. https://git.io/v14vL
<GitHub13> [artiq] sbourdeauducq pushed 1 new commit to master: https://git.io/v14JL
<GitHub13> artiq/master f3c50a3 Sebastien Bourdeauducq: rtio: always read full DMA sequence
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<bb-m-labs> build #251 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/251
<bb-m-labs> build #1150 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1150 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
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