sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<sb0> _florent_, thanks
<GitHub169> [misoc] sbourdeauducq pushed 1 new commit to master: https://git.io/v1x2M
<GitHub169> misoc/master 2775558 Tim 'mithro' Ansell: Adding documentation to the csr modules....
<sb0> mithro, alignment_bits gives a number of LSBs that are hardwired to 0 and stripped from storage
<sb0> write_from_dev allows the CSR to be also written by the core (not just the cpu=
<GitHub137> [misoc] sbourdeauducq pushed 2 new commits to master: https://git.io/v1xaE
<GitHub137> misoc/master a05121a Sebastien Bourdeauducq: spi_flash: fix bitbang with spi_width=1
<GitHub137> misoc/master 2b96c74 Sebastien Bourdeauducq: doc: remove outdated reference to dataflow actors
<bb-m-labs> build #188 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/188
<bb-m-labs> build #187 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/187
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<cr1901_modern> sb0: Was that SPI fix your doing or was it a patch from mithro?
<sb0> I wrote it
<cr1901_modern> Okay, just wondering. I may need to steal it to verify that a core on the Mimas board boots.
<bb-m-labs> build #283 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/283
<GitHub81> [artiq] sbourdeauducq opened issue #649: make runtime management interface independent from kernel interface https://git.io/v1xKy
<bb-m-labs> build #1182 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1182
<GitHub27> [artiq] whitequark commented on issue #649: OK. The only reason I implemented it like that in Rust is for feature parity. https://git.io/v1xX3
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<mithro> sb0: I'll update the docs a little and send you another pull request
<bb-m-labs> build #284 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/284
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<mithro> sb0: What does the storage_full do?
<bb-m-labs> build #1183 of artiq is complete: Failure [failed python_unittest_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1183
<cr1901_modern> mithro: For atomic writes, storage_full holds the value that will be written all at once
<cr1901_modern> I don't believe it's useful outside of atomic writes
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<sb0> mithro, storage_full isn't public
<sb0> rjo, larsc, _florent_ this iio-oscilloscope doesn't contain the relevant chips, we want ad9154 and ad9516
<sb0> are we just using ad9144 and ad9517 instead?
<sb0> it would be nice if you had made the modifications explicit...
<sb0> _florent_, rjo did you generate a .tsv from the wrong .xml, then patched it manually, and generated the .py and .h?
<sb0> is that how you did it?
<sb0> this is a mess
<sb0> _florent_, what xml did you convert and how?
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<sb0> _florent_, AD9516_HOLDOVER_ENABLEreg001D ?
<_florent_> sb0: since the .xml files were not available: ad9154 = ad9144 xml + manual changes, ad9116 = ad9517 xml + manual changes (chips are pretty similars)
<sb0> in this case there should not be a comment "auto-generated, do not edit"
<_florent_> yes but in my case the changes were made on the auto-generated file, not the xml.
<whitequark> apparently some people sell it as a *dietary supplement*
<whitequark> why on earth
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<sb0> whitequark, is it OK to use std::result in the runtime?
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<GitHub52> [artiq] cjbe commented on issue #574: I think I have seen this issue too: The injection monitoring does not work until rtio_init() has been called - this is only observable if one does not have a startup kernel that calls core.reset(). https://github.com/m-labs/artiq/issues/574#issuecomment-268561098
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<GitHub76> [artiq] sbourdeauducq commented on issue #574: Oh, I see. Call ``rtio_init`` then. There are other things that won't work if you don't call it.... https://github.com/m-labs/artiq/issues/574#issuecomment-268561955
<GitHub34> [artiq] sbourdeauducq commented on issue #574: Oh, I see. Call ``rtio_init`` (``core.reset``) then. There are other things that won't work if you don't call it.... https://github.com/m-labs/artiq/issues/574#issuecomment-268561955
<whitequark> sb0: std::result is the same as core::result
<whitequark> basically, std is a reexport of core plus alloc plus collections plus a bunch of other things like std::net
<whitequark> the runtime crate has core plus alloc plus collections as it depends on an allocator
<whitequark> the ksupport crate (for example) only has core
<whitequark> sb0: anyway, anything you can actually import in any of the crates is safe to use
<whitequark> any parts that won't work on our target are simply not built
<GitHub61> [artiq] cjbe commented on issue #574: Sure - this is just a gotcha when you are setting new hardware up: If you flash the board, and the first thing you try to do is toggle a TTL using the override it does not work. https://git.io/v1pOm
<GitHub141> [artiq] sbourdeauducq commented on issue #574: @whitequark did you see a problem specifically on OE, or was moninj simply not responding at all (until there was at least one core reset)? https://github.com/m-labs/artiq/issues/574#issuecomment-268613478
<GitHub55> [artiq] whitequark commented on issue #574: @sbourdeauducq it was definitely responding because I've seen some other pins at 1 https://github.com/m-labs/artiq/issues/574#issuecomment-268615064
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