sb0 changed the topic of #m-labs to: ARTIQ, Migen, MiSoC, Mixxeo & other M-Labs projects :: fka #milkymist :: Logs http://irclog.whitequark.org/m-labs
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<GitHub44> [sinara] gkasprow pushed 2 new commits to master: https://git.io/vN2ah
<GitHub44> sinara/master f092be6 Greg: Merge branch 'master' of https://github.com/m-labs/sinara...
<GitHub44> sinara/master b7433a6 Greg: update panel designs
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<q3k> _florent_: Did you ever finish integrating picorv32 into litex? I got it to the state where it boots again, not sure if I should sit down and implement IRQ support or you have a branch with that somewhere already :)
<_florent_> q3k: no it's still missing irq support, adding it would be really appreciated :)
<q3k> alright, I'll hopefully send a PR your way tomorrow
<sb0> rjo, where are the kasli schematics in pdf?
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<_florent_> q3k: thanks (missing pieces of software should be indicated with /* FIXME */)
<GitHub168> [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/migen/commit/219f2edd77a98ca5e524e3396c0f305262e0c036
<GitHub168> migen/master 219f2ed Sebastien Bourdeauducq: unify Si5324 and SFP pin names between Kasli and Sayma
<GitHub104> [misoc] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/67fc59ef47e59c228af7de88f4ca2b1bc6e8cc9b
<GitHub104> misoc/master 67fc59e Sebastien Bourdeauducq: kasli: use new pin names
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<GitHub136> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/5198c224a2fb9e86096100e4173093253724d783
<GitHub136> artiq/master 5198c22 Sebastien Bourdeauducq: sayma,kasli: use new pin names
<bb-m-labs> build #234 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/234
<bb-m-labs> build #370 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/370
<bb-m-labs> build #1118 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1118
<bb-m-labs> build #699 of artiq-win64-test is complete: Warnings [warnings python_coverage] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/699 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #1979 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1979
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<rjo> sb0: github releases, as discussed
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<GitHub154> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/25f3feeda8ac2e8b77df25f738f1ba9d1e2b3fb1
<GitHub154> artiq/master 25f3fee Sebastien Bourdeauducq: refactor targets
<GitHub12> [artiq] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/artiq/commit/53facfef133d841661cdb163e000e8ff23ecbe4c
<GitHub12> artiq/master 53facfe Sebastien Bourdeauducq: sayma: build fixes
<sb0> bb-m-labs, force build --props=package=artiq-sayma_rtm artiq-board
<sb0> bb-m-labs, force build --props=package=artiq-sayma_amc-standalone artiq-board
<sb0> bb-m-labs, force build --props=package=artiq-sayma_amc-standalone artiq-board
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<bb-m-labs> build forced [ETA 17m58s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<bb-m-labs> build #1119 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1119
<bb-m-labs> build forced [ETA 17m58s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #1120 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1120
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<bb-m-labs> build #1980 of artiq is complete: Failure [failed python_coverage] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1980 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
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<bb-m-labs> build #1121 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1121
<bb-m-labs> build #700 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/700
<bb-m-labs> build #1981 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1981
<sb0> bb-m-labs, force build --props=package=artiq-sayma_rtm artiq-board
<bb-m-labs> build forced [ETA 18m32s]
<bb-m-labs> I'll give a shout when the build finishes
<sb0> bb-m-labs, force build --props=package=artiq-sayma_amc-standalone artiq-board
<bb-m-labs> The build has been queued, I'll give a shout when it starts
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<bb-m-labs> build #1122 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1122
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build forced [ETA 18m32s]
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<bb-m-labs> build #1123 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1123
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<GitHub27> [artiq] KaifengC opened issue #903: Binaries missing in artiq 3.x on Windows https://github.com/m-labs/artiq/issues/903
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<sb0> rjo, si5324 rst_n is not connected on kasli, correct?
<sb0> _florent_, "serial = platform.request(serial)" ?
<GitHub141> [artiq] sbourdeauducq pushed 3 new commits to master: https://github.com/m-labs/artiq/compare/53facfef133d...77192256ea55
<GitHub141> artiq/master ab7c49d Sebastien Bourdeauducq: sayma_amc: raise error on invalid variant
<GitHub141> artiq/master c1ac3b6 Sebastien Bourdeauducq: sayma_rtm: fix 8fe463d4a
<GitHub141> artiq/master 7719225 Sebastien Bourdeauducq: kc705: style
<key2> why would a SyncFIFO input correctly in it's sink, but output only 0 instead of the values it read (with correctly setting the stream signal, just 0 as data) ?
<cr1901_modern> timing violation?
<rjo> sb0: according to the schematic, NC
<key2> cr1901_modern: such as sink/source not being on the same timing ?
<cr1901_modern> key2: I was thinking more that the data wasn't being held on the input to the FIFO long enough (setup time violation).
<sb0> rjo, isn't tx_disable active low?
<rjo> sb0: inverted. see schematic
<sb0> hmm no. it's inverted on kc705 but not on other boards.
<sb0> sayma should be fixed
<sb0> the 74x245 is not inverting
<sb0> the kc705 mosfet is
<rjo> sb0: yes. i was thinking of mod_present.
<sb0> bb-m-labs, force build --props=package=artiq-sayma_rtm artiq-board
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<sb0> bb-m-labs, force build --props=package=artiq-sayma_amc-standalone artiq-board
<bb-m-labs> The build has been queued, I'll give a shout when it starts
<GitHub145> [migen] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/migen/commit/a4df9c7e7efefd6b746b0050e58b4b3d84cd1371
<GitHub145> migen/master a4df9c7 Sebastien Bourdeauducq: sayma_amc: SFP TX disable is active-high
<bb-m-labs> build #1124 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1124
<bb-m-labs> build forced [ETA 19m25s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #1125 of artiq-board is complete: Failure [failed conda_build] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1125
<bb-m-labs> build #1982 of artiq is complete: Failure [failed python_coverage_1] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1982 blamelist: Sebastien Bourdeauducq <sb@m-labs.hk>
<bb-m-labs> build #235 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/235
<sb0> rjo, are you using the led gpio on kasli?
<sb0> bb-m-labs, force build --props=package=artiq-sayma_rtm artiq-board
<bb-m-labs> build forced [ETA 19m25s]
<bb-m-labs> I'll give a shout when the build finishes
<bb-m-labs> build #1126 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1126
<rjo> sb0: not yet. why are you asking?
<rjo> sb0, whitequark: i think we should do artiq 3.3 due to the binary packaging issue on windows.
<rjo> no. let's fix that spi issue first.
<sb0> what spi issue?
<sb0> that led may be better on rtio. and i plan to use it for drtio demos.
<rjo> that one is not visible in a crate.
<rjo> the one i files.
<rjo> *filed.
<GitHub88> [misoc] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/4542c63f4d150b0188ea966df269312ca900a6a8
<GitHub88> misoc/master 4542c63 Sebastien Bourdeauducq: kasli: increase flexibility to work around GTPE2_COMMON design
<bb-m-labs> build #371 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/371
<GitHub24> [misoc] sbourdeauducq pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/45f957abecb41bf3059d77fefaf95b7fb78f405e
<GitHub24> misoc/master 45f957a Sebastien Bourdeauducq: kasli: always have a period constraint on self.crg.cd_sys.clk
<bb-m-labs> build #372 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/372
<GitHub175> [artiq] sbourdeauducq pushed 4 new commits to master: https://github.com/m-labs/artiq/compare/77192256ea55...0d7340136539
<GitHub175> artiq/master 401e57d Sebastien Bourdeauducq: gtp_7series: fix nchannels assert
<GitHub175> artiq/master aa62e91 Sebastien Bourdeauducq: kasli: add DRTIO targets (no firmware)
<GitHub175> artiq/master 296ac35 Sebastien Bourdeauducq: sayma_amc: SFP TX disable is active-high
<sb0> _florent_, ERROR: [DRC REQP-1739] GTx R/TXOUTCLK drives inappropriate load: GTPE2_CHANNEL cell GTPE2_CHANNEL pin GTPE2_CHANNEL/TXOUTCLK (net: transceiver_txoutclk) should only drive BUFG, BUFH, BUFMR, MMCM or PLL loads, but drives one or more invalid loads such as BUFR cell BUFR. Please insert a BUFHCE (or a BUFMR, if the load is a BUFR) between the GT and its load(s).
<cr1901_modern> I should prob be using picocom...
<sb0> _florent_, what code did you test?
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<bb-m-labs> build #1127 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1127
<bb-m-labs> build #701 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/701
<bb-m-labs> build #1983 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1983
<q3k> cr1901_modern: i only use it because screen insisted on showing \n lines as if they were missing a carriage return...
<cr1901_modern> I use minicom b/c I totally forgot picocom exists. Also xmodem/kermit xfers
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<GitHub66> migen/master 3a8fe07 Robert Jordens: xilinx: find false path inputs using pins...
<GitHub66> migen/master 4246d18 Robert Jordens: vivado: multireg are nets, not cells
<GitHub66> migen/master 69be263 Robert Jordens: cdc: style
<GitHub66> [migen] jordens pushed 3 new commits to master: https://github.com/m-labs/migen/compare/a4df9c7e7efe...4246d182af70
<rjo> sb0: that lets me route sayma_amc with sawg
<GitHub20> [misoc] jordens pushed 1 new commit to master: https://github.com/m-labs/misoc/commit/9c343e1ce7c50284007a7513df7440e2fdb720fd
<GitHub20> misoc/master 9c343e1 Robert Jordens: kasli: period constraint for 125 MHz clock
<bb-m-labs> build #236 of migen is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/migen/builds/236
<rjo> sb0: but you should still try to relax the sed output paths. i think that's worthwhile.
<bb-m-labs> build #373 of misoc is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/misoc/builds/373
<cr1901_modern> rjo: Need to generate a spartan 7 single-tap proxy. Is this repo still the way to do it, despite the readme? https://github.com/jordens/bscan_spi
<rjo> cr1901_modern: https://github.com/jordens/bscan_spi_bitstreams/tree/single-tap but please do a proper pull request so that master also profits.
<cr1901_modern> Oh, there's actually a python script hidden in there. That works
<cr1901_modern> rjo: My mistake, I didn't notice that bscan_spi_bitstreams had the python script to generate the bitstreams
<GitHub63> [artiq] jordens pushed 5 new commits to master: https://github.com/m-labs/artiq/compare/0d7340136539...472840f16bb1
<GitHub63> artiq/master a86b28d Robert Jordens: urukul: example additions...
<GitHub63> artiq/master 5a9035b Robert Jordens: urukul: faster spi clock
<GitHub63> artiq/master ca1fdaa Robert Jordens: ad9910: relax timing for faster spi clock
<bb-m-labs> build #1128 of artiq-board is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-board/builds/1128
<bb-m-labs> build #702 of artiq-win64-test is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq-win64-test/builds/702
<bb-m-labs> build #1984 of artiq is complete: Success [build successful] Build details are at http://buildbot.m-labs.hk/builders/artiq/builds/1984
<GitHub62> [artiq] jbqubit commented on issue #903: @sbourdeauducq Please try installing 3.2 on a Windows 10 machine. You will see several hiccups in addition to those reported by @TheCakeIsAPi and @KaifengC. https://github.com/m-labs/artiq/issues/903#issuecomment-359552144
<GitHub58> [artiq] jbqubit commented on issue #854: > Another issue could be with lock stability. In PHY devices the reference clock and TX clock frequency cannot differ more than 100ppm.... https://github.com/m-labs/artiq/issues/854#issuecomment-359553380
<_florent_> q3k: great, thanks!
<cr1901_modern> mithro: ^^ Now picorv32 works
<q3k> _florent_: yw
<GitHub65> [artiq] jbqubit commented on commit 94592c7: Search path should also include path like ```anaconda3/envs/artiq-dev2/share/bscan-spi-bitstreams/``` and where openocd puts proxy bitfiles. https://github.com/m-labs/artiq/commit/94592c7a4c40a6d75a717867777ccdfd17bdfae3#commitcomment-27028984
<GitHub128> [artiq] jbqubit commented on issue #898: @whitequark Build output for RTM doesn't follow same directory hierarchy other designs. So, ```artiq_flash --srcbuild ./artiq_sayma_rtm -t sayma_rtm load``` fails line after this one: ... https://github.com/m-labs/artiq/issues/898#issuecomment-359578397
<GitHub87> [artiq] jbqubit commented on issue #898: Then ```programmer_flash_binary``` fails since ```'artiq_sayma_rtm/software/bootloader/bootloader.bin'``` doesn't exist. https://github.com/m-labs/artiq/issues/898#issuecomment-359579924
<GitHub175> [artiq] jbqubit commented on issue #898: Then ```programmer.flash_binary(*config["bootloader"], bootloader_bin)``` fails since ```'artiq_sayma_rtm/software/bootloader/bootloader.bin'``` doesn't exist. https://github.com/m-labs/artiq/issues/898#issuecomment-359579924
<GitHub194> [artiq] jbqubit commented on issue #898: Default action for RTM shouldn't be default="proxy gateware bootloader firmware start" since there is not bootloader. User ought not have to know this. ... https://github.com/m-labs/artiq/issues/898#issuecomment-359584333
<GitHub107> [artiq] jbqubit commented on issue #898: And more bugs... Did you test this before pushing? ... https://github.com/m-labs/artiq/issues/898#issuecomment-359588904
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