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[mattermost] <sb10q> @hartytp the si549 is definitely not working. here's what I see at the output pin (CLK+):@hartytp the si549 is definitely not working. here's what I see at the output pin (CLK+)::
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[mattermost] <sb10q> this "pulse" repeats regularly
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[mattermost] <sb10q> well, seems this is just noise coupling into the probe
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[mattermost] <sb10q> I have 3.3V on pin 1 (OE)
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[mattermost] <sb10q> the Si549 outputs 10MHz after I2C reset, and I get that both on the scope and in the FPGA
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[mattermost] <sb10q> so it's some obscure register value that is wrong...
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[mattermost] <sb10q> the datasheet example values don't work. did we get the si549 special sayma edition?
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[mattermost] <sb10q> the datasheet also says that fbdiv is reset to 0, but it obviously isn't, I read back a different value and also I couldn't get 10MHz after reset if it were
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[mattermost] <sb10q> aah. no, it's not 0
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[mattermost] <sb10q> the values I read back are consistent with 10MHz
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[mattermost] <sb10q> okay it works now, but I don't know why lsdiv=2 breaks it
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[mattermost] <sb10q> @hartytp @weidazhang any idea?
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[mattermost] <sb10q> some tag differences from main DDMTD core on Sayma AMC: [729, 729, 726, 728, 729, 722, 731, 726, 726, 726, 727, 726, 725, 721, 724, 723, 722, 724, 718]
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[mattermost] <sb10q> (with the FFs)
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[mattermost] <sb10q> the transceiver is also happy with the si549 clock and I get drtio link
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[mattermost] <hartytp> what other divider values were you using?
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[mattermost] <hartytp> @weidazhang can you have a look at this please?
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[mattermost] <hartytp> @weidazhang where did your choice of dividers come from? The SI549 suggests that one gets best performance with the lowest value of LSDIV (lowest VCO frequency)
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[mattermost] <sb10q> the VCO frequency does not depend on LSDIV
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[mattermost] <hartytp> you can achieve the same output frequency with different divider combinations
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[mattermost] <hartytp> I think the point is that they want you to keep FBDIV low rather than increasing both FBDIV and LSDIV
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[mattermost] <sb10q> the Si549 initialization values
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[mattermost] <hartytp> @sb10q when you say those divider values didn't work...what happened?
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[mattermost] <sb10q> output stuck at 0
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[mattermost] <hartytp> @weidazhang I actually don't understand the Si549 instructions. I take back my earlier comment about LSDIV
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[mattermost] <hartytp> The instructions are pretty clearly to use the min value of LSDIV possible (i.e. determine HSDIV*LSDIV and chose the smallest LSDIV)
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[mattermost] <hartytp> that makes me think that the low-speed divider has a max frequency (maybe model dependent)
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[mattermost] <hartytp> see data sheet section 5.2
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[mattermost] <hartytp> that suggests that the values @sb10q is now using are the correct ones to use
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[mattermost] <weidazhang> @sb10q 0x04b5badb98a gives 124.996185 is the helper frequency. The other one is the main.
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[mattermost] <sb10q> @weidazhang my question has a simple yes/no answer
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[mattermost] <sb10q> should I swap the helper/main values currently in the code, or no?
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[mattermost] <hartytp> yes
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[mattermost] <weidazhang> yes
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[mattermost] <sb10q> ok thanks
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[mattermost] <hartytp> @weidazhang what are your thoughts about LSDIV=4 not working ?
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[mattermost] <weidazhang> Don't know, does it output any frequency at all?