sb0 changed the topic of #m-labs to: https://m-labs.hk :: Mattermost https://chat.m-labs.hk :: Logs http://irclog.whitequark.org/m-labs
<ZirconiumX> whitequark: I'm going to sleep soon, but could you look at Yosys bug 1630? It seems to be partly caused by a conflict between read_aiger and nMigen's anonymous wire naming?
<mtrbot-ml_> [mattermost] <sb10q> @pkulik so what's the "JESD core not ready" behavior on your boards?
<whitequark> ZirconiumX: uhh, if nMigen outputs legal RTLIL wire names (anything without spaces in them is fair game currently AFAIK) then this is a bug in read_aiger
<whitequark> yeah
<ZirconiumX> The hardest problem in computer science strikes again
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<_whitenotifier-5> [nmigen-boards] nicolas-robin opened pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJXn
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJXc
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<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJXX
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<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJ1m
<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] nicolas-robin commented on pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJ1X
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJMv
<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJM1
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<Stormwind_mobile> mithro: thanks for the pointer, will look into it!
<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
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<mtrbot-ml_> [mattermost] <sb10q> @astro is openocd/gdb pipe (`target remote | openocd -c "gdb_port pipe; log_output openocd.log" -f zc706.cfg`) also affected by https://git.m-labs.hk/M-Labs/zc706/issues/8 ?
<mtrbot-ml_> [mattermost] <sb10q> mh, yeah of course it is
<mtrbot-ml_> [mattermost] <sb10q> sigh
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<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJAz
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJA2
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<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJp8
<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJpu
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<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] whitequark reviewed pull request #43 commit - https://git.io/JvJpQ
<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJpx
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<_whitenotifier-5> [nmigen-boards] nicolas-robin synchronize pull request #43: Add Digilent Nexys 4 DDR board - https://git.io/JvJXJ
<_whitenotifier-5> [nmigen-boards] nicolas-robin reviewed pull request #43 commit - https://git.io/JvJj4
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<mtrbot-ml_> [mattermost] <pkulik> @sb10q sorry, I didn't have time to check it on other boards with newest build
<_whitenotifier-5> [nmigen-boards] TiltMeSenpai opened pull request #44: Add Alchitry Au board definition - https://git.io/JvUkF