Topic for #milkymist is now Radical Tech Coalition :: Milkymist One, Migen, Milkymist SoC & Flickernoise :: Logs: http://en.qi-hardware.com/mmlogs
<Fallenou>
25 minutes to generate official Milkymist SoC bitstream using a debian virtualized in virtualbox on my mac book pro Core 2 Duo 2.4 GHz
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<Fallenou>
lekernel_: 25 min to generate bitstream, does it sound a lot to you ?
<wpwrak>
sounds like you have a fast machine :)
<wpwrak>
it also takes ~25 min on my Q6600, native
<Fallenou>
ok so i'm not in such a bad position then
<wpwrak>
naw, you're suffering just like the rest of us :)
<Fallenou>
I can't blame my computer if mmy design does not go as fast as I expect :)
<Fallenou>
mmu*
<wpwrak>
hehe :)
<Fallenou>
I confirm timings are met using official milkymist git branch
<Fallenou>
I must have done something wrong
<Fallenou>
will have a look
<Fallenou>
wpwrak: do you know if lekernel_ is using xst or synplify to generate nowadays Milkymist SoC bitstreams ?
<Fallenou>
it seems Xst is the default ATM in the makefile
<wpwrak>
i would think he uses the makefile, yes. but i don't know for sure
<Fallenou>
ok
<Fallenou>
I've heard about something like Xst generating errors in lm32 caches that got solved using synplify but don't know if it's still the case with recent ISE milestones
<Fallenou>
will update the wiki to add --without-ftd2xx
<Fallenou>
but after lunch
<Fallenou>
bbl
<wpwrak>
stekern: it tends to gets multithreaded and interrupt-driven as soon as you add USB ;-)
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<stekern>
wpwrak: oh, you are speaking about the usb-implementation... I feel your pain ;)
<stekern>
but as long as your driver doesn't do interrupts, it should still be pretty much just polling
<wpwrak>
yeah, as long as you don't use u-boot for much, it's pretty okay. like the plastic swiss army knife. as long as you don't open it, it'll be in good shape forever ;-)
<stekern>
you shouldn't be backtalking the swiss army knives though, my 20 year old trusty victorinox still has its corkscrew in excellent shape! (and it has been opened on several occassions)
<wpwrak>
i'm talking more of the malaysia-made ones ;-)
<stekern>
heh, ok
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<stekern>
anyways, in my openrisc-m1soc merging adventure I've taken the path of porting BIOS to openrisc rather than porting the m1soc to u-boot
<wpwrak>
good :)
<stekern>
I deemed that to be easier, and I'm lazy ;)
<wpwrak>
laziness, the engineer's #1 virtue
<stekern>
I agree
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<Fallenou>
do I need svf or bsdl support in my urjtag ?
<Fallenou>
cause none of both compiles
<kristianpaul>
svf is not just for cpld?
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<Fallenou>
ok got urjtag to work and flashed the bitstream successfully
<kristianpaul>
good
<wolfspraul>
Fallenou: cool! it seems you are making massive progress!
<Fallenou>
yep !
<Fallenou>
I'm getting good to go :)
* Fallenou
heating up
<Fallenou>
wiki updated
<Fallenou>
ftdi chip is hotter than fpga
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<lekernel>
Fallenou: you shouldn't need to flash your bitstream, you can load it directly with pld load xxx.bit
<Fallenou>
by flashing I meant loading it
<Fallenou>
I just did 'make load-bitstream'
<Fallenou>
mmu branch meets timing with ISE 13.4 :o good
<Fallenou>
now need to write FSM for TLB management (check/miss/update/flush)
<lekernel>
ok, just make sure that all hits take only 1 cycle
<Fallenou>
ok
<Fallenou>
I hope tlb miss won't happen too often
<Fallenou>
because it would generate exception, kernel would have to lookup pfn using memory loads and then update tlb line and then return
<Fallenou>
:/
<Fallenou>
lekernel: would an update to a ITLB line update the DTLB line as well ?
<Fallenou>
or would we just want to be able to update independently each TLB
<Fallenou>
I think we could gain having two different contents in those two TLBs
<Fallenou>
so updating ITLB and DTLB independently
<lekernel>
both I and D caches and TLBs operate independently
<Fallenou>
ok
<Fallenou>
just wanted to be sure :)
<kristianpaul>
ah m1nor need to rewritten
<kristianpaul>
to m1load
<kristianpaul>
lekernel: sorry for mistype words but can you please stop writing private mails everytime you get angry by reading others mistakes!
<kristianpaul>
sorry OT
<Fallenou>
well, maybe it's better keeping it private rather than sending corrections each time on the public list, isn't it ?
<kristianpaul>
sorry
<kristianpaul>
sorry all
* kristianpaul
checks how to use spell checker inside mutt
<kristianpaul>
s/mutt/vim
<Fallenou>
yep spell check is helpfull sometime :)
<Fallenou>
-l ;-)
<larsc>
+s
<larsc>
;)
* larsc
needs a spell checker for irssi
<kristianpaul>
larsc: ha mee too ;)
<Fallenou>
It will be fun to test if MMU is working properly
<Fallenou>
either modifying RTEMS, or Linux .... or a custom bios
<Fallenou>
maybe a custom bios
<Fallenou>
is it possible to reboot into bios ?
<Fallenou>
holding a button or something
<Fallenou>
instead of booting to rtems shell/FNoise
<lekernel>
and I guess we map that to the middle button of the existing boards? and keep the current behaviour for the other two buttons?
<Fallenou>
hum strange, I tried unplugging power supply, keeping ESC pressed (in uart, not a real USB keyboard plugged to M1), then plug power supply again, it prints a few letters and then nothing more
<wpwrak>
sounds good to me
<lekernel>
Fallenou: you can use reset instead of unplugging the power supply, and what are those letters?
<lekernel>
you can also use Q instead of ESC
<kristianpaul>
reset or make boot :)
<lekernel>
(capital Q)
<wpwrak>
larsc: btw, thanks for reminding me about my FSM - i had already forgotten about it ;-))
<wpwrak>
Fallenou: the Esc is not very timing-critical. it's sufficient to press if when you see the first sign of life from the BIOS
<Fallenou>
this is with holding capital Q when booting
<wpwrak>
pressing something while booting may uncover unexplored dangers :)
<wpwrak>
hmm, just one press should do
<Fallenou>
oh damn
<Fallenou>
it's just minicom crap
<lekernel>
Fallenou: use flterm
<Fallenou>
using flterm I get the bios
<Fallenou>
yes
<Fallenou>
good
<lekernel>
yes, that's also why I wrote flterm... iron out all this serial port mess
<Fallenou>
I think the bios will be helpful to debug mmu
<wpwrak>
ah, you wrote flterm. interesting.
<Fallenou>
simple program, easy to check program control flow
<lekernel>
or you can find out what set of minicom options happens to work, if you have some time to waste
<wpwrak>
how about making it easier to pick the gdb pass-through device ? not sure what would be the best approach. perhaps setting a symlink specified by the user or such
<Fallenou>
ooooh I get all the bios prelude now when booting ! flterm rocks
<kristianpaul>
make boot; make standby; life esier !
<Fallenou>
what does it do exactly ?
<kristianpaul>
avoid you push buttons
<Fallenou>
well make load-bistream loads a new bitstream and reboots the system without pushing any button
<wpwrak>
yeah, jtag-boot is for when you have the bitstream in NOR. also, if you have the new standby bitstream that doesn't wait for a button, you can just do a pld reconfigure
<Fallenou>
hum ok
* Fallenou
just understood that he needs to modify lm32-gnu-as to add support for MMU CSR
<wpwrak>
(pld reconfigure) instead of jtag-boot. not instead of pld load.
<Fallenou>
are you using gcc 4.5.2 or 4.5.3 ?
<kristianpaul>
may be too early to ask, but this MMU will be optional in the future? :)
<Fallenou>
imo it will easily be optional
<Fallenou>
just like ICACHE and DCACHE
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<larsc>
lekernel: any better idea how to find out which actors may qualify for timesharing than comparing each actor which every other actor?
<larsc>
finding a valid schedule fast is the next problem
<kristianpaul>
lekernel: had you ever used TIG in constraint file? ;)
* kristianpaul
wonder if lattice have such extensive documentation as xilinx does
<lekernel>
larsc: no, not really...
<lekernel>
kristianpaul: yes, see tdc core
<kristianpaul>
ah intereting
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