11:52 <larsc> more Xilinx madness, I think I'll join the haters club. I tried to use their Linux driver for SPI on zynq today. Which of course didn't work at all, but after some fixing I got it to a point where it would only fail sometimes.

11:52 <larsc> like 1 in 5 SPI transfers wouldn't start

11:52 <larsc> you start a SPI transfer by writing a 1 to a register, repeating that line 5 times makes the issue go away

11:53 <larsc> So I read through the datasheet and found this: 'The SPI reference clock (spi_ref_clk) must be set to a higher frequency than the CPU_1x clock

11:53 <larsc> frequency.

11:53 <larsc> '

11:53 <larsc> spi_ref_clk was 100MHz and CPU_1x was 133MHz, so this explains why the edge is lost sometimes

11:54 <larsc> But turns out the Xilinx tools don't allow you to set a higher frequency for SPI core than 100MHz...

11:54 <larsc> Manually overwriting the clock register, so the core is clocked at 200MHz also fixes the issue

13:52 <lekernel> larsc, use lm32 :)

13:53 <lekernel> you can run it at 200MHz on kintex 7

14:00 <larsc> can't really compete with a dual core ARM with 1300 MIPS each, so that's not really an option

14:00 <larsc> just got a call from one of their support guys, 'yeay, known issue, but we didn't bother to make the AR public'...

14:01 <Fallenou> =)

14:01 <larsc> but at least it will be fixed in 14.5

14:10 <larsc> lekernel: It would be interesting to see though how well the lm32 would compare to the microblaze in our designs for non-zynq platforms

14:11 <lekernel> already ran mibench on milkymist/lm32 vs. edk/microblaze, similar clock frequency and caches. milkymist is some 20% faster.

14:14 <larsc> not bad

14:16 <larsc> for some reason we seem to the microblaze on 100MHz even on K7

17:59 <larsc> das hackerhaus ist das schon viel besser

18:05 <larsc> ups

18:05 <larsc> wrong channel

18:54 <mwalle> Fallenou: could you send a patch for the CFG2 CSR to the binutils ml ?

19:03 <antgreen> \

19:29 <sb0> and I think for the other MMU CSRs too, if they are definitive?

19:31 <Fallenou> mwalle: OK will do it

19:32 <Fallenou> do you have the mailing list address ?

19:32 <Fallenou> http://sourceware.org/ml/binutils/ ?

19:45 <mwalle> bug-binutils@gnu.org i guess

19:46 <mwalle> mh no binutils@sourceware.org with some kind of [Patch] tag in the subject

19:46 <Fallenou> hum ok

19:46 <Fallenou> ok thanks

19:57 <GitHub120> [linux-milkymist] larsclausen pushed 15 new commits to master: http://git.io/tSAniQ

19:57 <GitHub120> linux-milkymist/master a94271a Lars-Peter Clausen: lm32: switch to generic sys_sigaltstack...

19:57 <GitHub120> linux-milkymist/master b533446 Lars-Peter Clausen: lm32: Use _save_altstack helper...

19:57 <GitHub120> linux-milkymist/master 64d30a6 Lars-Peter Clausen: lm32: Get rid of pm_idle...

19:59 <Fallenou> shouldn't we let icache/dcache/itlb/dtlb sizes accessible from the software ?

19:59 <Fallenou> in a register, somewhere ?

20:00 <Fallenou> well maybe i/d cache sizes (and cache line size) are not so important for the software/kernel

20:01 <Fallenou> but i/d tlb sizes is important

20:56 <mwalle> larsc: cool cleanups :)

21:01 <mwalle> Fallenou: imho compile time configs or dtb properties are sufficient

21:03 <mwalle> i dont know if its worth to spend a csr for it

21:13 <Fallenou> ok

22:15 <larsc> mwalle: yea, most of the theobroma madness is now gone, signal handling still needs a cleanup though