lekernel changed the topic of #milkymist to: Mixxeo, Migen, Milkymist-ng & other Milkymist projects :: Logs: http://en.qi-hardware.com/mmlogs :: Mixxeo preorder lists.milkymist.org/pipermail/devel-milkymist.org/2013-May/003344.html
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<GitHub1> [milkymist-ng] sbourdeauducq pushed 2 new commits to asmi: http://git.io/atOCYw
<GitHub1> milkymist-ng/asmi d557a9a Sebastien Bourdeauducq: asmicon/bankmachine: fix full selector
<GitHub1> milkymist-ng/asmi 3917ab4 Sebastien Bourdeauducq: videomixer: rescale pots
<GitHub189> [migen] sbourdeauducq pushed 1 new commit to master: http://git.io/LM9C5A
<GitHub189> migen/master 0c52c08 Sebastien Bourdeauducq: bus/asmibus: fix slot aging timer
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<GitHub182> [migen] sbourdeauducq pushed 1 new commit to master: http://git.io/y3LYrg
<GitHub182> migen/master ac2cde0 Sebastien Bourdeauducq: asmibus: remove port sharing
<GitHub169> [milkymist-ng] sbourdeauducq pushed 2 new commits to asmi: http://git.io/NEQNQg
<GitHub169> milkymist-ng/asmi 279a145 Sebastien Bourdeauducq: videomixer: add fb.c
<GitHub169> milkymist-ng/asmi b2319fd Sebastien Bourdeauducq: videomixer: support different resolutions
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<lekernel> new slowtan6 bug: 800x600 on both channels fucks up all PLLs, including the system clock one
<kristianpaul> urgh
<kristianpaul> how come?
<lekernel> because no spartan6 feature works correctly, ever
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<wpwrak> makes you wonder how the others fpgas are ...
<lekernel> I had hopes for Tabula, but it turns out their software crashes way before reading the first byte of a HDL source file
<wpwrak> do you think the spartan thing is just a synthesis problem, or hardware ?
<lekernel> it could be because I'm not using the GCLK pins to drive the PLLs...
<lekernel> but it looks hardware. works fine until a certain pixel clock frequency, then everything breaks down (including serial output)
<lekernel> also works if only one channel is active
<wpwrak> hmm. could it be power ?
<lekernel> mh
<lekernel> for some reason it doesn't happen in bios
<lekernel> the PLLs lock and everything looks normal there
<kristianpaul> perhaps you dont wanna do it the xilinx way (hardware thing) ?
<kristianpaul> how are you driving the PLLs instead? ahh you using exp connector ;) isnt?
<lekernel> yes
<kristianpaul> ahh
<kristianpaul> that could explain part of it,
<kristianpaul> why not use glck from memcard?
<kristianpaul> just to give it a chance
<kristianpaul> play safe :)
<GitHub175> [milkymist-ng] sbourdeauducq pushed 1 new commit to asmi: http://git.io/j-Bq1w
<GitHub175> milkymist-ng/asmi cd910b8 Sebastien Bourdeauducq: videomixer: timeout on IDELAY busy
<GitHub178> [milkymist-ng] sbourdeauducq pushed 3 new commits to master: http://git.io/RL742g
<GitHub178> milkymist-ng/master 81d35ef Sebastien Bourdeauducq: videomixer: add fb.c
<GitHub178> milkymist-ng/master 13bf6f5 Sebastien Bourdeauducq: videomixer: timeout on IDELAY busy
<GitHub178> milkymist-ng/master bb43171 Sebastien Bourdeauducq: videomixer: support different resolutions
<davidc__> lekernel: the PLLs are sourced from logic lines?
<lekernel> yes
<lekernel> davidc__, it goes through the general interconnect
<davidc__> Ah, yeah, Xilinx FPGAs really don't like when you do that
<davidc__> lekernel: if you can; try hand-wiring a *CLK capable input to the clock signal
<davidc__> and see if that fixes it
<lekernel> I don't really understand why they don't like this
<lekernel> is it because of jitter? internal crosstalk?
<lekernel> duty cycle distortion?
<davidc__> lekernel: Probably a combination of all of the above + black voodoo magic
<lekernel> I don't believe in black voodoo magic :)
<davidc__> lekernel: the occasional sacrifice is needed to get timing closure
<lekernel> swearing seems to work too
<lekernel> at least mine does
<lekernel> this is kinda frustrating, the picture with only 1 channel really looks clean in 800x600 now ...
<lekernel> maybe I should just wait for the mixxeo boards
<GitHub29> [milkymist-ng] sbourdeauducq pushed 1 new commit to asmi: http://git.io/LuyN1g
<GitHub29> milkymist-ng/asmi 3240413 Sebastien Bourdeauducq: top: better performance
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