lekernel changed the topic of #milkymist to: Mixxeo, Migen, Milkymist-ng & other Milkymist projects :: Logs: http://en.qi-hardware.com/mmlogs :: Mixxeo preorder lists.milkymist.org/pipermail/devel-milkymist.org/2013-May/003344.html
<azonenberg>
Hawk777: is it non-copyleft open source?
<azonenberg>
My entire SoC is BSD and i'm hoping to keep it that way
<azonenberg>
My build system can optionally link with a GPL'd library and be dual-licensed
<azonenberg>
But otherwise is pure BSD, all of the RTL is BSD too
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<Hawk777>
azonenberg: not sure what GRLIB’s license is; you should check it yourself. I don’t need to know as I’m only using it in stuff that will probably never be released anyway.
<azonenberg>
I see
<azonenberg>
I'll look into it
<azonenberg>
I need to learn more hard number-theory math anyway
<azonenberg>
and opencores has a complete lack of elliptic curve stuff last i looked
<azonenberg>
even the RSA modules they had were horrible
<larsc>
I think gems are rare on opencores in general
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<azonenberg>
Lol, true
<azonenberg>
the last CPU i tried to use from there didn't even synthesize on the platform they said it was designed for :p
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<azonenberg>
if you read, the PLL jitter prevents it from being fully standard compliant
<lekernel>
yeah, don't get me started on slowtan6 PLL jitter. but that's a different problem, which you could workaround with an external PLL chip.
<azonenberg>
Lol
<azonenberg>
Or use 7 series
<azonenberg>
Have you used 7 yet?
<lekernel>
no
<lekernel>
except running lm32 synthesis on vivado, which looked quite good. of course, maybe the bitstream it produced in so little time would not work when loaded ;)
<azonenberg>
lol
<lekernel>
ysionneau, goes down to 9169Mbps with simultaneous read/write
<ysionneau>
still nice
<lekernel>
could perhaps be optimized in a simple way by changing r/w switch decision thresholds, haven't tried
<ysionneau>
what do you mean by "all:10270Mbps" ?
<lekernel>
total data rate going into + out of the DRAM chips is 10270Mbps
<ysionneau>
because you're doing read and write at the same time during the same test
<lekernel>
I have a write core and a read core
<ysionneau>
are the results good for Mixxeo? for dual dvi input + vga output and maybe previsualization on two small LED screens ?
<lekernel>
I can run them simultaneously or not
<ysionneau>
ok understood
<lekernel>
it'll be top-notch AMOLED :) finally got the german bureaucrats to ship them, yay!
<lekernel>
getting the IO specification from I€€€, on the other hand, is another problem
<lekernel>
worst case it should not be too hard to RE from the various bits of info they let slip
<ysionneau>
:)
<ysionneau>
so you think there will be enough ram bandwidth for all of this
<ysionneau>
maybe trying to reduce the ram used by lm32 can save some bandwidth, by using small sleep loops entirely contained in the cache
<ysionneau>
and just serve interrupts
<lekernel>
yes, 720p will use 7G
<lekernel>
lm32 is <200M even with a lot of cache misses
<lekernel>
also, mixxeo will have 20% faster memory (DDR400 instead of DDR333)
<lekernel>
and a -3 slowtan6 that should run at 100MHz almost without excessive headache
<ysionneau>
so you will be able to access the DDR400 with a 200 MHz clock?
<lekernel>
yes
<lekernel>
hopefully
<ysionneau>
that would be cool!
<GitHub51>
[milkymist-ng] sbourdeauducq pushed 2 new commits to master: http://git.io/wGKJiQ