<icecream95>
As can be seen in the last screenshot, only small sections of the map are rendered at a time, which seems similar to what happens with the Polymer renderer for EDuke32
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<HdkR>
TFW I'm waiting for Kirin 980/990 SBCs to arrive so I can throw them in CI
<HdkR>
Or a Snapdragon 865 devboard running Linux :P
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<alyssa>
tomeu: TILE_RANGE_FAULT is from the min/max_tile_coord arguments being wrong
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<alyssa>
tomeu: Anyway, yes, the job stuff can do writes
<alyssa>
so it's possible we have something so corrupted that that's writing to the fragment payload
<tomeu>
alyssa: so maybe the min/max_tile_coord fields get overwritten if the job descriptor isn't aligned correctly?
<tomeu>
well, the header
<alyssa>
Yeah, I'm wondering if that could be something ish
<alyssa>
Probably not exactly that but
<alyssa>
Ohhhh this is interesting
<alyssa>
Hold your horses~
<alyssa>
tomeu: mali_payload_fragment is too slow
<alyssa>
*small
<alyssa>
Ithink
<alyssa>
idk how that would result in the corruption we're seeing but could be a hw bug
<alyssa>
Bifrost - even the bugs have bugs~
<tomeu>
mali's mali_job_descriptor_header is aligned to 512 in this trace
<alyssa>
and ours?
<alyssa>
Modifying pandecode to make payload_fragment larger, I see there is stuff after what we decode. It's not clear to me if it's part of the structure or the adjacent thing.
<tomeu>
to 256
<tomeu>
ok, those are really good hints
<alyssa>
tomeu: I'd give 512 alignment a try then. Seems like a very silly thing but maybe they were aggressively optimizing the job handling logic and wanted to simplify the address computation :p
<tomeu>
hehe
<tomeu>
would you do something like that? :p
<alyssa>
tomeu: absolutely.
<alyssa>
Note job_descriptor_header is 32 bytes
<alyssa>
payload fragment on Midgard is 16 bytes
<alyssa>
The next 16 bytes are zero
<alyssa>
Then data only starts showing up again after that
<alyssa>
which indicates either that the payload is a LOT bigger than we thought, or that it's no bigger at all and that's spurious data from another unrelated descriptor (midgard blobs do that too)
<alyssa>
isn't Mali fun? :3
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<tomeu>
it works and fails regardless of the alignment (the gpu address doesn't change between runs)
<tomeu>
so I guess I will look at missing descriptor fields on monday
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<alyssa>
alright~
<alyssa>
Next up for me - implementing load_uniform
<alyssa>
and then attributes and varying writes
<alyssa>
in the packing
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<alyssa>
in the packing
<alyssa>
oops
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<alyssa>
Okay, I have packing for varying writes now.
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<alyssa>
tomeu: narmstrong: What are folks using for kernels on the N2?
<alyssa>
(I assume it's not mainline..)
<narmstrong>
alyssa: you mean hardkernel ?
<narmstrong>
I personally only use mainline
<narmstrong>
Same for chewitt
<chewitt>
everything needed for N2 is already upstream
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<chewitt>
minus some bits for hardware video decode, but that's mostly done for 5.7 and no something needed for panfrost work
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<alyssa>
chewitt: Oh, awesome !
<alyssa>
narmstrong: what about panfrost? iirc you had patches for panfrost.ko for amlogic issues?