Lofty changed the topic of #prjmistral to: Project Mistral: Yosys (and hopefully nextpnr) on Cyclone FPGAs - https://github.com/ZirconiumX/mistral - logs: https://freenode.irclog.whitequark.org/prjmistral
<chipb> man, it's disappointing they pulled the archives offline. they can't have cost much to leave up.
<kc8apf> I've managed to scavenge quite a bit
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<Sarayan> I have 8 delays called "rr rf fr ff RR RF FR FF", any idea what they mean? I suspect r=rise, f=fall.... maybe it's min and max then for capitalization
<mwk> eg rf would be input rise edge -> output fall edge
<mwk> not sure about the capitalization
<sorear> .oO( allelles? )
<mwk> could be min/max indeed
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