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<LunaVorax>
Hi
<wpwrak>
hmm. seems that i've found a code generation bug in gcc :-( (cross-compiling for the ben)
<wpwrak>
given a code fragment tricky = foo; if (blah) tricky = bar; is adds the equivalent of else tricky = tricky;
<wpwrak>
unfortunately, "tricky" is a register (with volatile and all that) ...
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<wpwrak>
... PDFUNS, to be precise. and it very much resents this sort of treatment.
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<whitequark>
wpwrak: sounds like an optimizer gone wrong
<whitequark>
I'm fairly sure that volatile semantics (apart from being inapplicable for I/O memory) forbids that
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<larsc>
wpwrak: can you paste the code?
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<wpwrak>
whitequark: yes, looks like the optimizer got confused. i think my code indicates things correctly. need to see if i may have been a bit overzealous with the volatile, though. (not that this would be an excuse, but it may have made life unnecessarily hard for the poor compiler.)
<wpwrak>
but first the morning mails and some caffeine ...
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<wpwrak>
if you compile it with gcc 4.6.3 or gcc 4.7.2, e.g., for amd64 or mipsel, gcc reads from *ptr. my understanding is that it's not supposed to do that. anyone disagrees ?
<wpwrak>
btw, with llvm 3.0, i get the code i expect. in fact, llvm is a bit too zealous and treats "ptr" as volatile as well
<wpwrak>
(compiling with -O9)
<Fallenou>
hum it seems gcc should only write to ptr
<wpwrak>
2:1 against gcc's interpretation :) or 3:1 if we count llvm.
<larsc>
there is probably a clause somewhere in the standard that permits this
<larsc>
and gcc sticks to the standard and not to what is practical
<wpwrak>
the standard is pretty fuzzy about "volatile"
<wpwrak>
particularly the memory barrier example is puzzling. it would seem that just making that pointer volatile ought to do the trick. yet ...
<larsc>
I even get the problem without the first *ptr = 1;
<larsc>
ah, no misread the generated cod
<larsc>
e
<larsc>
It's a bit strange anyway on ARM it generates "movne r2, #2; ldreq r2, [r3]; str r2, [r3]" while the shorter "movne r2, #2; strne r2, [r3]" would be correct
<wpwrak>
yeah, it really really wants to do that read :)
<wpwrak>
an obsessive-compulsive anti-optimization
<whitequark>
larsc: compare with total count of repositories by language
<whitequark>
idiots are distributed roughly evenly ;)
<whitequark>
larsc: what actually worries me is Puppet. because sysadmins gotta know it better.
<larsc>
whitequark: turns out I copy pasted the link to fast, the path: filter doesn't seem to work
<larsc>
it's just text somewhere in a readme file
<whitequark>
larsc: the actual link has the majority in ruby too
<whitequark>
larsc: btw I'm not even sure why does it has the same distribution or shows ruby at all. That stuff should be in dotfiles theoretically...
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<wpwrak>
of course, now my delay measurements are probably off ...
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<larsc>
can't you just work around the bug?
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<wpwrak>
i could change the API. e.g., instead of PDFUNS = foo; it would become write_reg(PDFUNS, foo), etc.
<wpwrak>
but i kinda like to keep those register accesses nice and simple. besides, a lot of other people are probably using quite similar things.
<wpwrak>
so the work-around for now is to drop the optimization level
<wpwrak>
(API change) or do things like #define PDFUNS(x) write_reg(__PDFUNS, x). a little less ugly, but still. also, there may be other registers outside the GPIO group that don't have nice *ptr = *ptr semantics either
<wpwrak>
only that those might be even harder to spot
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<wpwrak>
hmm. still getting trouble despite the -O1 :-(
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<wpwrak>
especially those you find in other people's code :) (and even more so if what you do doesn't depend on their code)
<wpwrak>
well, this one has quite interesting effects. what happens is that the bad accesses to PDFUNS mess up the keyboard. in ubb-la, this means that the "press key to abort" functionality i'm adding mis-fires. (and of course, the keyboard in general doesn't behave very well after that involuntary reconfiguration)