<azonenberg>
Also i think i just found a bug in my PLL, investigating
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<whitequark>
azonenberg: remember, it's connected to my laptop
<whitequark>
if i take the laptop with me and close it, it gets offline
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<monochroma>
azonenberg's test setup literally gets up and walks away! :P
<whitequark>
lol
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<azonenberg>
lol
<azonenberg_work>
So last night i was starting to think of a framework for doing better clock recovery of bidirectional buses
<azonenberg_work>
basically you need a flag that specifies which end has control of the bus
<azonenberg_work>
and you sync to one clock or the other
<azonenberg_work>
The eventual goal for DDRx, USB, etc would be to be able to do two separate eye patterns on the data depending on who's talking
<whitequark>
oh, nice
<azonenberg_work>
So my plan is to make a little extraction filter that takes a USB PCS-layer symbol stream as input and spits out a boolean flag saying which end has control of the bus
<bvernoux>
ha very nice feature
<azonenberg_work>
Then the clock recovery PLL will take an optional "gate" input that ignores any transitions when that signal is low
<azonenberg_work>
and freezes the output during that time
<bvernoux>
all is done in real-time on PC side ?
<azonenberg_work>
Yes
<azonenberg_work>
Well, real time as data comes off the scope
<azonenberg_work>
the scope is the performance bottleneck right now wrt getting data to me fast enough
<bvernoux>
or it is something which can be also "synthethized" in FPGA migen ... ?
<azonenberg_work>
My current implementation is postprocessing based but that may change
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<azonenberg_work>
i plan to move some of it to GPU in the future
<azonenberg_work>
Basically my problem right now is that i can't do eye patterns of USB
<bvernoux>
yes will be amazing to do that in GPU
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<azonenberg_work>
The PLL cant slew fast enough to compensate for the phase shift as you have one end talking then the other
<azonenberg_work>
while also being stably locked normally
<bvernoux>
but to keep an option to use it on CPU too in case GPU is too slow
<azonenberg_work>
And if i ignore that, i get massive "jitter" that isnt really jitter in the eye
<bvernoux>
do you have tried some RF algorithm for that too ?
<azonenberg_work>
Not yet, i'm in the middle of trying to clean up some bugs in my PLL
<azonenberg_work>
I was trying to have it lock to the center of the data eye (rather than the edges) and had some bugs as a result introducing phase shifts
<bvernoux>
liquidsdr has a very interesting things for that
<bvernoux>
for those interested I'm planning a tuto on how to tune NFC Antenna and all components with 100% open source tools ;)
<bvernoux>
with concrete example using HYdraNFC v2 Antenna + Shield which will be open source KiCad scehmatic/board too
<bvernoux>
using next gen NFC chipset TBD ;)
<bvernoux>
I will reveal the Chipset when it will be publicly released
<bvernoux>
as there is clearly a big hole in how really work NFC and how to tune it
<bvernoux>
the most funny will be to have new tool to exploit NFC with buffer overflow and code injection over NFC low layer ;)
<bvernoux>
as there is clearly a big hole to test anything on NFC and developer think tags are perfect mainly because of lack of real/advanced NFC Tag Emulation which does not cost > 10KUSD ...
<azonenberg>
This is my homebrew Z0 probe though, pretty happy with how it turned out although i think with a pcb/mechanical respin i can make the shaft a little skinnier to fit in tighter spots
<azonenberg>
I also need to add more clearance at the top around the coax connector, as it stands the current connector doesn't fit without you milling down the enclosure :p
<tnt>
heh, you usb probing setup is much better looking that mine :p (which is just a USB A femare directly soldered to a USB A male and 4 flying wire out of it :p.
<bvernoux>
as now there is more and more USB PD available
<bvernoux>
it is even 20mV increment ;)
<whitequark>
PD is so awful
<bvernoux>
yes ;)
<bvernoux>
over complicated
<whitequark>
"overcomplicated" doesn't even begin to describe it
<bvernoux>
and lot of device will burn in flams with it ;)
<whitequark>
have you seen the "fast role swap" thing it has?
<whitequark>
have you seen the eye diagrams for PD data?
<whitequark>
TWELVE points
<whitequark>
that's for 200 kbps
<bvernoux>
it is why I'm interested in how it works like the proverb say "Know your enemy and know yourself and you can fight a hundred battles without disaster." ;)
<bvernoux>
ha no I have not seen it
<bvernoux>
shall be funny ;)
<bvernoux>
especially to deliver 100W with USB 3.0 or even worse 3.1 10Gbps ;)
<bvernoux>
I suspect it shall not work ;)
<bvernoux>
IIRC it is not possible to do both ...
<whitequark>
bvernoux: i don't see why it wouldn't work
<whitequark>
well, in theory
<bvernoux>
because of noise especially with chinese power supply ;)
<whitequark>
nah
<whitequark>
pcie works just fine with noisy chinese power supplies
<whitequark>
and usb 3 physical layer is just butchered pcie
<bvernoux>
I imagine it will do so strong spurs at 100W (20V/5A) that USB 3.x 5GBps or 10GBps will have a crappy eye diagram
<bvernoux>
it is just the pins are not far and also it depends on routing ...
<whitequark>
also
<bvernoux>
but it is interesting to check that in future
<bvernoux>
as in theory it is possible
<whitequark>
that noise isn't the right frequency
<whitequark>
i mean, take a look at thunderbolt
<whitequark>
that's 10/20 Gbps also and it coexists just fine with 100 W charging
<whitequark>
there are many systems in the wild that use it
<whitequark>
fun thing though
<bvernoux>
with 100W ?
<whitequark>
yes
<whitequark>
thunderbolt docks are a popular thing
<whitequark>
they do charging and thunderbolt, and they work mostly fine
<bvernoux>
IIRC they consume something like 25W
<whitequark>
they don't consume, they provide power
<bvernoux>
but maybe yes there is 100W too now
<bvernoux>
yes they provide ;)
<whitequark>
thing is
<whitequark>
it does not coexist with wifi
<whitequark>
i got strong interference between both 2.4G and 5G WiFi and TBT
<bvernoux>
yes I imagine the mess
<whitequark>
... that is, until i disassembled my laptop, threw out all of their badly placed copper tape, and wrapped it in even more metal tape myself
<whitequark>
then it started working mostly ok
<whitequark>
these people put wifi card right opposite the tbt chip
<whitequark>
and fixed it with lots of copper foil
<whitequark>
that does not adhere very well to pcbs
<whitequark>
and actually isn't enough
<whitequark>
wrapping the entire wifi card right up to the ufl connections helped
<bvernoux>
strange how they have done the compliance ;)
<bvernoux>
with such bad design
<whitequark>
i think it has precisely enough copper foil to pass compliance
<whitequark>
whether it works was more of an afterthought
<bvernoux>
we all know how are done the test ;)
<bvernoux>
I have done some in paste
<bvernoux>
you add tons of ferrite in order it pass compliance
<bvernoux>
then you do not add them on final product ...
<whitequark>
lol
<bvernoux>
I know it is like that for lot of HW :(
<bvernoux>
mainly just to pass EMC
<bvernoux>
big ferrite are designed to pass EMC tests ;)
<bvernoux>
there is some funny story about that for car manufacturer ;)
<bvernoux>
I even remember a company which was validating bluetooth dongle the test with EMC was impossible as it crashed the PC HDD ;)
<whitequark>
wtf
<bvernoux>
and the guy came back with a ruggerized PC and again it crashed ;)
<bvernoux>
it was panic mode ;)
<bvernoux>
and now they do such test in china ;)
<bvernoux>
and we have tons of IoT cheat ;)
<bvernoux>
I have just finished some tuning on NFC it is crazy how accurate pF is important
<bvernoux>
I was sure even 10pF delta shall do not have a major impact and I was totally wrong even just for 13.56Mhz ;)
<bvernoux>
as there is impact with a delta of 2pF
<bvernoux>
qucs is just a must have for such advanced simulation
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<_whitenotifier-3>
[scopehal] azonenberg pushed 3 commits to master [+0/-0/±4] https://git.io/fjcaz
<_whitenotifier-3>
[scopehal] azonenberg 1a4a0fa - ProtocolDecoderParameter: added boolean argument support
<_whitenotifier-3>
[scopehal] azonenberg 2e5f2d3 - Removed hacky workaround from EyeDecoder2
<_whitenotifier-3>
[scopehal] azonenberg ab823c4 - Various tweaks to clock recovery decoder to handle lower frequency inputs better. Added support for gating when the input stops toggling.
<_whitenotifier-3>
[scopehal] azonenberg pushed 1 commit to master [+2/-0/±4] https://git.io/fjcVO
<_whitenotifier-3>
[scopehal] azonenberg d48bf44 - Added USB bus activity decoder