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<mkk_>
[Olof Kindgren, skywater-pdk] @Arman Avetisyan Is there a skywater sram cell? I was under impression that we should use openRAM for that
<mkk_>
[Arman Avetisyan, skywater-pdk] @Olof Kindgren There is ready to use SKY130_SRAM_MACROS (https://github.com/efabless/sky130_sram_macros/) on efabless github. And it's disabled in openlane by default. Keep in mind it's registered inputs, registered outputs design
<mkk_>
[Arman Avetisyan, skywater-pdk] Problem is I can't figure out why it is not used in my design. If I enable it.
<mkk_>
And I asume Yosys does not even know about existence of this cell so he wont use it.
<mkk_>
Currently I think the problem is that the openlane makefile contains error. It can disable but with current makefile it is impossible to enable it without makefile modification.
<mkk_>
[Olof Kindgren, skywater-pdk] @Arman Avetisyan I see. I don't use the flow in the same way so I can't answer that unfortunately
<mkk_>
[Arman Avetisyan, skywater-pdk] OpenRAM can't be used in SKY130 as far as I am aware without signing NDA because the ready to use scripts and configurations files are not available open-source
<mkk_>
[Arman Avetisyan, skywater-pdk] Can somebody correct me?
<lkcl>
Arman: for the Libre-SOC 180nm we are doing custom 4k SRAM cells (thanks to Chips4Makers) which are simply marked with a "blackbox" attribute
<lkcl>
coriolis2 then noted the "blackbox" attribute and told yosys not to do anything with it
<lkcl>
daveshah wrote a script that *does* auto-detection of SRAM cells and will "munge" the netlist to use such "black boxes" (aka "an SRAM cell")