08:26 <sf-slack> <kgugala> good morning

08:31 <sf-slack> <mgielda> morn'

08:35 <sf-slack> <mkurc> good time of day ;P

11:42 <sf-slack> <acomodi> Good time of day! I was looking at the prepacker and the way the best_pattern is found. The issue with dram not working with https://github.com/SymbiFlow/vtr-verilog-to-routing/pull/9 should be due to the fact that the round robin policy is used also for non-carrychain patterns. This can lead to the alternate selection of DRAM128 and DRAM128_DP which will produce errors in the cluster_router step. I would suggest to

11:42 <sf-slack> use a mixed strategy with the usage of RR for carrychains and first-fit for the other patterns, what do you think?

11:42 <tpb> Title: [WIP] round robin packing by kgugala · Pull Request #9 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com)

11:43 <sf-slack> <kgugala> this should be easy to implement - we can try this and see how it works

20:17 <sf-slack> <tmichalak> I updated the issue with handling slice_l and slice_r in the same CLB (https://github.com/SymbiFlow/vtr-verilog-to-routing/issues/8) with my latest findings

20:17 <tpb> Title: Placer cannot handle slice_l and slice_r carry chains in the same CLB · Issue #8 · SymbiFlow/vtr-verilog-to-routing · GitHub (at github.com)

20:18 <sf-slack> <tmichalak> I am still not sure what is the exact root cause and how to fix it so any thoughts appreciated