clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<promach> ZipCPU: how is induction length related to number of assertion required ?
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<ZipCPU> promach: The relationship isn't necessarily simple. Sometimes adding assertions just make induction take more time, other times it makes it take fewer steps.
<ZipCPU> It's sort of dependent upon your code and your problem.
<ZipCPU> In general though, if induction is failing you want to add more assertions, or perhaps assumptions (about your inputs)
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<promach> ZipCPU: just asking for assert() advice, for https://i.imgur.com/netGg9Q.png , what do you think about https://github.com/promach/UART/blob/development/rtl/Rx/sampling_strobe_generator.v#L35 ?
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<calebone> hello all
<calebone> wonder if i'm in the right place for help with ice40hx serial interface question
<calebone> all must be out celebrating! happy new year all, see you in 2018
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<ZipCPU> calebone: If you are looking for advice with #yosys, and the icestorm toolsuite, you've come to the right place.
<ZipCPU> I just try to take Sunday's
<ZipCPU> off, so ... you won't find me (personally) answering questions. Others might.
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<awygle> wow it's sunday already? what happened to my vacation?
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<qu1j0t3> evaporated
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