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<promach_>
Do you guys think if we should formally verify a submodule first before formally verifying the overall module itself ?
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<ratko>
Hey i have question. Does Yosys provide timing and area occupancy of synthesized design on standard cell?
<mattvenn>
hey ZipCPU , a picture in your repo would help people understand what it was!
<mattvenn>
it's super cool
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<dmin7>
hi (again)! .. i'm trying to make icosoc start an application from flash (on the icezero board), but .. it doesn't x). it works fine when i don't have the flashpmem option enabled in icosoc.conf / loading appimage to ram .. but when i enable it i do get the BOOTLOADER> prompt (and i can also write an appimage to it at that point, and it says XX bytes written) .. but after the RUN nothing happens
<dmin7>
anybody knows it it should "just work" that way, by any chance?
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<dmin7>
(i did check the flash contents and appears to write icosoc and the appimage parts to the right offsets)
<dmin7>
in the wiki it says:
<dmin7>
flashpmem: Use SPI flash as program memory. Executing code from the SPI flash is very slow! But it enables much larger programs to be used with the SoC. This will modify the boot loader and a different linker script will be used to link the program. Everything in the ELF section .text.sram will be placed in SRAM. Make sure that performance critical functions are placed in this ELF section.
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<ZipCPU>
mattvenn: Like ... what?
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