clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<ZipCPU|Laptop> For those interested in my ZipCPU work, you can read the presentation slides I just gave at ORCONF here: https://github.com/ZipCPU/zipcpu/blob/master/doc/orconf2018.pdf
<ZipCPU|Laptop> My title was, "Lessons learned while formally verifying the ZipCPU"
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<emeb> Formal verification means you wear a tuxedo during the process?
<emeb> (or evening gown & pumps, depending on your preference)
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