clifford changed the topic of #yosys to: Yosys Open SYnthesis Suite: http://www.clifford.at/yosys/ -- Channel Logs: https://irclog.whitequark.org/yosys
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<donn__> heyo, just have a question about the .asc format
<donn__> do .sym statements affect the bitstreams or are they just there for readability purposes
<gatecat> They don't affect the bitstream, in theory I think they can be used for back annotation
<donn__> gotcha, thanks
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<lambda> is this valid systemverilog? yosys chokes on it, and I'm about to fix it but I wanted to make sure https://bpa.st/VNAQ
<tpb> Title: View paste VNAQ (at bpa.st)
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