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<firefrommoonligh> Just a vent... The way ST does RMs can be frustrating in this regard: There's no easy way to tell what's different between variants and RMs. Most of it is the same! Finding the differences is a pain. I'm not sure what the ideal solution is though
<firefrommoonligh> User manuals are easier to eyeball differences with due to focusing on periph availability etc
<firefrommoonligh> I guess the traditional mindset is "company picks MCU. Engineers focus on it specifically and learns its details". I'm curious the (long-lasting) effects of this chip shortage will have on that, if it's true
<firefrommoonligh> Flexibility is key now
<firefrommoonligh> The shift is due to bit 0 being unused by the MCU. I can't figure out the | 1 part. It's not documented in comments in those HALs, nor in any of the RMs I've looked at. They expliciltly say the 0-bit doesn't matter in 7-bit addressing mode
<therealprof[m]> The LSB is the R/W flag.
<therealprof[m]> Depending on the peripheral that is either implicit or explicit. Here it has to be incorporated into the address by code.
<firefrommoonligh> (master mode)
<therealprof[m]> It's also a common source of confusion because some manuals factor the LSB in and others don't when mentioning I2C addresses.
<therealprof[m]> (random number generator)
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