pepijndevos changed the topic of #apicula to: Project Apicula: bitstream documentation and tooling for Gowin FPGAs https://github.com/YosysHQ/apicula -- logs https://freenode.irclog.whitequark.org/apicula
<pepijndevos> trabucayre, does this packbits change make sense to you? Maybe that's why CRC hasn't been working, but just want to make sure it's the correct fix, and we're not just matching bugs on Apicula and OpenFPGALoader
<trabucayre> I didn't see anything about CRC computation... Maybe I'm stupid (or tired :))
<trabucayre> CRC is working for Apicula and OpenFPGALoader no?
<trabucayre> I'have compared results between fs content (when usercode is not used) and Apicula or OpenFPGALoader and it's always match
<pepijndevos> Uhhhh, maybe? I got kind of in a habit of ignoring any "fail" messages from OpenFPGALoader
<trabucayre> OpenFPGALoader never fails (or issue are required) ;-)
<pepijndevos> I thought there was also this issue that you had to set a bit to allow it to read back the bitstream to verify
<trabucayre> Yes I need to add a reback. But With gowin you need to disable something otherwise you read only 0xff
<trabucayre> for all device I need to implement readback...
<trabucayre> security bit maybe
<pepijndevos> I'll try the fix, to see if I can actually get an error-free upload with or without...
<pepijndevos> yea... works as-is for me for gw1n-1
<pepijndevos> well, for gw1n-9 it fails SRAM Flash: FAIL
<pepijndevos> ce26 fede
<pepijndevos> let's see if the axis fix does anything useful
<pepijndevos> yea it actually fixes it for gw1n-9
<pepijndevos> let's see 4
<pepijndevos> oh f my nextpnr branch doesn't have the db yet.
<trabucayre> your gw1n-9 bitstream is with EBR ?
<pepijndevos> EBR?
<trabucayre> weird I'm sure apicula working to compute CRC for gw1n-9
<trabucayre> embedded block ram
<pepijndevos> no bram
<trabucayre> ok...
<pepijndevos> Yea weird... I'm not sure where the bug came from... but I can confirm it was broken and works now
<pepijndevos> welp, GW1N-4 still broken checksum but 0000 661c
<pepijndevos> So I guess that means it can't read back the bitstream at all, right?
<trabucayre> not currently yep...
<trabucayre> I've somewhere code to read back
<pepijndevos> So why is it different for the different gowin devices? Is it just the different ftdi chip? or do they use different jtag commands?
<trabucayre> everything same...
<trabucayre> No I'm wrong gw1n-1 has some different timings compare to others
<trabucayre> 1/ Need to add readback 2/ need to order one gw1n-4
<pepijndevos> Then why does it work for gw1n-9 but give 0000 for gw1n-4?
<trabucayre> (3/ need to play to lotto :)))
<trabucayre> good question -> 4/ need to reread datasheet...
<pepijndevos> lol okay
<trabucayre> but in my mind gw1n-1 has specifics timings, others models same but gw1n-9 has padding
<pepijndevos> right
<trabucayre> for RUNBER CRC has always been broken?
<pepijndevos> Uh... it's only been supported for a week. What I could do is try a vendor bitstream
<trabucayre> maybe
<trabucayre> but anyway, if it's supported by openFPGALoader I need to have corresponding FPGA to check
<trabucayre> it's a bit expensive hobby ;-)
<pepijndevos> heh, since people are giving me money I can get you one if you want
<trabucayre> people give you money to support your work :)
<trabucayre> In fact I'm a bit uncomfortable with gifts (I know it's definitely stupid)
<trabucayre> An idea for CRC==0, timing before reading register is too short. For design with EBR I had to increase delay