<pepijndevos>
ohoh, ops are running low in this channel.
<pepijndevos>
enough ops? haha
<omnitechnomancer>
Oh no
<pepijndevos>
What, you don't want to feel responsible and in power? haha
<pepijndevos>
There you go
<pepijndevos>
Okay I killed the attosoc. Blinky finishes instantly... I guess now I need to do the constraints correctly to test it on the board.
_whitelogger has joined #apicula
<pepijndevos>
WHYYYYY
<omnitechnomancer>
<pepijndevos "WHYYYYY"> ??
<pepijndevos>
WHY would anyone in their right mind think it was a good idea to use the JTAGSEL_N pin for clock input?
<pepijndevos>
I kinda forgot why but I disable this pin from being used in the fuzzer, so you can't actually place an IOB there in Apicula
<pepijndevos>
Basically what this pin hoeds is that when you configure the JTAG pins as regular IO, this pin reverts it back to JTAG IIRC
<pepijndevos>
Although I'm now running the fuzzer with that pin to try to remember why I added a special case for it, and so far no problems.
<pepijndevos>
wtf... I removed the JTAGSEL_N special case and it still doesn't know about the pin.
<pepijndevos>
Hrm, maybe I should make the fuzzing less sequential. Like... if I change a thing at the beginning of the process it currently has to urn the whoooole process.
<pepijndevos>
Such as... changing the pin definitions.
<omnitechnomancer>
Mhmmm :/
<pepijndevos>
Problems solved I think
<pepijndevos>
Now waiting for the rube golberg machine to complete so that I can send a one-line PR to nextpnr to add the gw1n-4 chipdb.
<pepijndevos>
It's funny, I have *no* idea what the GW1N-4 looks like. It just sortof worked.