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<mwk> hmm, the sys_clk_freq is 12MHz on glasgow, correct?
<whitequark> no
<whitequark> 30 or 48 MHz on revAB and revC respectively
<mwk> huh
<mwk> I'm trying to use the program-xc6s applet
<mwk> it works quite well, but is horribly slow by default
<mwk> so I'm speeding it up by passing --freq
<mwk> and it seems --freq=6000 is the largest working value
<mwk> --freq=6001 results in the applet failing to work
<whitequark> yes
<whitequark> that's unfortunately the case for the JTAG applet right now
<whitequark> all the serial applets are using a horribly inefficient architecture for, well, actually exchanging data
<whitequark> actually doing this was largely blocked on nmigen migration, which is still not fully complete
<mwk> ah
<mwk> *sigh* I need to finally learn nmigen and have a shot at improving this applet a bit
<whitequark> right now there's an FSM and a 2FF synchronizer on all inputs
<whitequark> for SPI and JTAG
<whitequark> so you get a shitton of latency on every bit
<mwk> right
<mwk> latency isn't that bad though if you compensate for it
<mwk> so... there isn't an easy fix I could do, like bumping the clock by some PLL?
<whitequark> so... async applets are also broken, and also were blocked on nmigen migration
<mwk> ah well
<mwk> fine with me
<whitequark> you can remove the synchronizer i think
<mwk> it's faster than platform cable already anyway
<mwk> would be nicer if it had a bitstream cache though
<mwk> rebuilding applets on this craptop is... slow
<whitequark> it's there because i don't really know about the clock-to-out and input-to-clock relationship
<whitequark> it might work out just fine without it
<whitequark> probably will on any clock rate under 24 MHz
<whitequark> actually, that's not even using IOB registers
<whitequark> re bitstream cache, that was blocked on nmigen...
<whitequark> you can see a pattern i think
<mwk> heh
<whitequark> but for once that's actually something that is easy to add.
<whitequark> i might just do it later today or sth
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