<azonenberg_work> WOOT
<azonenberg_work> Need to do some more testing but i think i just got this hardmask process worked out
<azonenberg_work> the trick is to use a ton of hcl and very little h2o2
<adc> noice
<adc> what was the pi u sent me
<azonenberg_work> adc: Which pic?
<azonenberg_work> The projct website has several
<azonenberg_work> And i was having trouble with unetched Cr in trenches
<azonenberg_work> I finally figured out an etch process that can remove it
<azonenberg_work> Now i just need to see if my photoresist will survive it
<CIA-67> homecmos r139 | trunk/lithography-tests/labnotes/azonenberg_labnotes.txt | Today's lab notes
<azonenberg_work> Getting there - some undercut, it will need tweaking
<azonenberg_work> But in half an hour i expect to have results from a deep etch
<azonenberg_work> Might need a little more Cr and a little less Cu
<azonenberg_work> But it's the right mix
<azonenberg_work> looks like Cr etches ~5nm/min while Si etches 2600nm/min
<azonenberg_work> So that would mean my adhesion layer is >5nm thick, more like 50
<azonenberg_work> I'll need around a 190 minute etch to go through wafer, which means about a micron of Cr - very feasible to do with an evaporator
<azonenberg_work> Then coat with a thin Cu layer to protect against oxidation
<azonenberg_work> and actually, more like 500nm of Cr
<azonenberg_work> since i am going both ways
<azonenberg_work> But i think this is the process i will end up using
<CIA-67> homecmos r140 | trunk/lithography-tests/labnotes/azonenberg_labnotes.txt | The rest of today's lab notes
<azonenberg> Die J3 @ 100x http://i.imgur.com/ttSY7.jpg
<azonenberg> and 400x http://i.imgur.com/eQdeM.jpg
<azonenberg> There was some undercut of the mask in a few spots, and the Cr hardmask was too thin so it got eaten through
<azonenberg> And the etch was far from aligned to the crystal axes
<azonenberg> But for a first attempt i dont think its bad at all
<azonenberg> But we're a way out from having a working CPU
<azonenberg> I have done full 8-bit designs on FPGAs (and am working on a 32-bit now)
<azonenberg> In terms of home fab so far we've done basic 2D copper interconnect wiring and i just got the beginnings of a silicon etch process working
<azonenberg> transistors are still further down the roadmap
<flowr> how many Mhz can someone get up to, with a homebrew CPU of transistors?
<azonenberg> flowr: First you have to have specs for the transistors (switching speeds etc)
<azonenberg> Then you have to do the gate-level design and find critical paths
<azonenberg> then you can compute the maximum delay along that path and that gives you the max frequency
<flowr> critical paths = bottle neck?
<azonenberg> flowr: yeah, pretty much
<azonenberg> biggest delay between a pair of flipflops
<azonenberg> including gates and wiring
<azonenberg> My guess is, >10 MHz using discrete transistors is not happening
<azonenberg> even thats high
<flowr> have you done any homebrew computers this way?
<azonenberg> if you integrate it you may have a chance
<azonenberg> I've used FPGAs
<azonenberg> and am now working from the other end up on home chip fab
<azonenberg> But we dont even have functional transistors yet
<flowr> home chip fab? You mean, making your own ICs?
<azonenberg> flowr: Yeah, thats what the channel is about lol
<flowr> but I mean, small ones :P
<flowr> or is that what you mean? :O
<azonenberg> flowr: Small as in low gate count? Yes
<azonenberg> Small as in 22nm? No, our chips are huge dimension wise :p
<flowr> that's what I thought :P
<azonenberg> most of my test dies are a few mm across and the components are in a ~0.5mm disk in the middle
<azonenberg> But i havent actually fabricated anything more complex than test patterns in copper wiring
<azonenberg> and, most recently, the beginnings of a MEMS device
<azonenberg> hoping for a simple working MEMS unit by end of this calendar year and logic gates some time in 2012
<flowr> what does one have to do, to get past 20Mhz, if one is soldering one's own gates on a circuit board?
<flowr> Do you need pretty small transistors to get past 20Mhz?
<azonenberg> flowr: No, you need them close together
<azonenberg> I mean, getting a single gate that fast is easy
<azonenberg> getting a string of gates end to end that fast is harder
<flowr> is it because the copper wire between them?
<flowr> of*
<azonenberg> flowr: Routing delay is significant, yes
<azonenberg> especially in FPGA designs due to the less efficient routing it can be >50% of your total path delay
<azonenberg> If you have fast gates and long wires (like a breadboarded design) it will be even worse
<azonenberg> Making a working cpu is entirely feasible
<azonenberg> making it fast is hard
<azonenberg> I havent really looked into what transistor speeds etc would be in a homebrew fab process yet
<azonenberg> its so far out that i have more pressing things to worry about
<azonenberg> Like fully etching all of my chromium layers http://colossus.cs.rpi.edu/~azonenberg/images/homecmos/2011-09-20/die_i4_009.jpg
<azonenberg> this is an electron microscope shot of one of my chips taken last week
<azonenberg> light gray is copper, dark is silicon
<azonenberg> medium is chromium (which is under the copper and should be completely removed in the trenches)
<flowr> does the chromium conduct?
<azonenberg> Slightly, yes
<azonenberg> But i wasnt using it as a wire
<azonenberg> The chrome is there because copper won't stick to things well by itself
<azonenberg> it sticks to Cr and Cr sticks to a lot
<azonenberg> So a sandwich of the two is common
<flowr> how did you build this?
<azonenberg> I also was using the sandwich as an etch mask for a future processing step
<azonenberg> Cant talk too much, its 2 am here and i need sleep, but heres a brief overview
<flowr> k, maybe you should sleep :P
<azonenberg> start with blank <110> silicon wafer, score and snap into ~3mm pieces
<azonenberg> deposit Cr + Cu layers in a vacuum evaporator on campus (building one of my own is on the to-do list but is a few months out)
<azonenberg> go back home, spin coat in photoresist
<azonenberg> expose, develop, etch in HCl with a few drops of 3% H2O2 added
<azonenberg> the Cr residue in this pic was the result of using too much H2O2
<azonenberg> the Cu etched fine but the Cr formed CrO2 which is difficult to remove
<azonenberg> and protected the underlying Cr from further etching
<azonenberg> AFKs
<flowr> night
<azonenberg> lab notes are in the google code repo in the channel topic
<azonenberg> if you want all of the gory details
<azonenberg> just look at recent changes and open up azonenberg_labnotes.txrt
<B0101> hi Azonenberg
<azonenberg> hi B0101
<azonenberg> Did you see my pics from last night?
<B0101> nope
<azonenberg> 100 and 400x
<azonenberg> the mask was somewhat undercut so the lines got attacked
<azonenberg> and the edges are rough since i didnt properly align everything to the crystal planes
<B0101> whoa
<azonenberg> B0101: where'd you go?
<azonenberg> (08:23:19) azonenberg: http://i.imgur.com/ttSY7.jpg
<azonenberg> (08:23:22) azonenberg: http://i.imgur.com/eQdeM.jpg
<azonenberg> (08:23:25) azonenberg: 100 and 400x
<azonenberg> (08:23:36) azonenberg: the mask was somewhat undercut so the lines got attacked
<azonenberg> (08:23:59) azonenberg: and the edges are rough since i didnt properly align everything to the crystal planes
<B0101> azonenberg: my computer crashed
<azonenberg> :(
<B0101> this system is old\
<azonenberg> But as a first try i think its pretty good - i need a thicker Cr layer and possibly a shorter HCl etch before the KOH
<azonenberg> this was my first attempt at a deep KOH etch and it was at least somewhat successful :)
<B0101> graet! :) btw, i have IRC logging on, so i can still see you links
<azonenberg> Wasnt sure if they had actually gone through lol
<azonenberg> often when a client crashes it freezes for a while and stops getting data
<azonenberg> then the OS closes the connection
<B0101> but I got the link 3 seconds before it crashed so it would have been logged in
<azonenberg> oh i see
<azonenberg> Any luck with your squids?
<B0101> yes
<azonenberg> :)
<azonenberg> how far have you gotten
<B0101> i managed to fabricate a simple one
<azonenberg> :)
<azonenberg> Out of what? And how small?
<azonenberg> And have you tested it?
<CIA-67> homecmos r141 | wiki/images/ (S7301905_fullres.jpg S7301905_thumb.jpg) | Uploaded two more images to wiki
<B0101> Silicon, on a piece of silicon 5 cm
<B0101> i tested it, but it stopped working an hour ago
<azonenberg> So it worked for a while, then stopped?
<B0101> yup
<azonenberg> any idea why? If it was transistor based my first guess would be trace metal contamination
<B0101> No ideas yet but I am investigating
<azonenberg> well make sure to post lab notes at some point so we can see
<azonenberg> Remember, we dont just want a working process
<azonenberg> we want to know what went wrong and how you dealt with it
<azonenberg> it could be very helpful to someone else having a similar problem
<azonenberg> similar symptoms might indicate a similar problem, etc
<B0101> The only thing I know is that it changed from rainbow color to silver and thats all i know
<azonenberg> Hmm, rainbow color indicates a thin transparent layer (oxide etc)
<azonenberg> silver would mean either much thicker or none
<azonenberg> did it get hot in operation at all?
<B0101> nope
<B0101> I don't know if it is the voltage
<B0101> I applied 5V AC to it
<azonenberg> No idea what they expect
<azonenberg> this is your research lol
<B0101> I'm gonna go back to the lab to investigate further
<azonenberg> quantum computing is not my area of interest atm
<azonenberg> And ok
<B0101> See you in 18+ hours
<azonenberg> ok