ChanServ changed the topic of #lima to: Development channel for open source lima driver for ARM Mali4** GPUs - Kernel has landed in mainline, userspace driver is part of mesa - Logs at https://people.freedesktop.org/~cbrill/dri-log/index.php?channel=lima and https://freenode.irclog.whitequark.org/lima - Contact ARM for binary driver support!
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<MoeIcenowy> anarsoul: I have no issue on chromium, but on QtWebEngine
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<anarsoul> MoeIcenowy: well, on QtWebEngine :)
<rellla> anarsoul: http://imkreisrum.de/deqp/deqp-lima-master-dd99f1f80-stencil/ is a current result with deqp
<rellla> i sorted the skips out and now we have a complete overview of the tests that are failing still.
<rellla> there are some tests, that fail on mali-r6p2, too. i think we can focus on the remaining ones here: http://imkreisrum.de/deqp/deqp-lima-master-dd99f1f80-stencil/deqp-only-lima-fails.txt
<rellla> this is with stencil support. though i have one test left, that i need to fix.
<anarsoul> clipping fails badly
<rellla> these are the new findings from today: https://pastebin.com/raw/2qcH6c8E
<rellla> but i need to know, what 0xf412 stands for. maybe some calculations with glClearDepth?
<rellla> i'm out of ideas...
<anarsoul> that's RSW?
<anarsoul> let me check...
<anarsoul> rellla: have you tried to convert 0xf412 from fp16?
<anarsoul> rellla: can you review this MR once again? I change code a bit: https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3027
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<anarsoul> rellla: see commented out part of stencil_test assignment
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<anarsoul> /(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
<anarsoul> so 0xf412 is alpha ref value and I bet it's in FP16, not in ubyte
<rellla> hm...
<rellla> actual codr
<rellla> code
<anarsoul> you dropped alpha->ref_value part
<anarsoul> try glAlphaFunc() and see if it changes
<anarsoul> :)
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<anarsoul> rellla: enunes: please have a look at https://gitlab.freedesktop.org/mesa/mesa/merge_requests/3027
<anarsoul> I'd really like to merge it ASAP to stop answering the questions where to get this patch :)
<enunes> anarsoul: I'm a bit away from those issues, but to me it looks good to merge
<enunes> one thing I have in my mind about the debug flags (certainly for a separate patch) is about the 'all' flag, maybe we should eventually split it so that 'all' just enables the increased-debug-output related ones and not the disable-feature-debug ones
<enunes> or maybe just add a 'debug' option and leave 'all' as-is
<anarsoul> yeah, it's better to add 'debug' option and leave all as is
<anarsoul> or drop it since it doesn't make much sense
<enunes> btw about ppir scheduler: I keep hitting corner cases with the new liveness analysis, piglit is without regressions but deqp hit some new regressions... I'm still working on it and have redesigned it a couple of times already
<enunes> it's very tricky because some corner cases end up generating a result with variable that is written but never read or something like that
<anarsoul> enunes: that's why we need optimizations for ppir
<anarsoul> written but never read variables should be eliminated with DCE
<enunes> well DCE can basically be a byproduct of the new liveness analysis that I have
<anarsoul> yet it should be done as a separate optimization pass
<enunes> the algorithm is exactly the same
<anarsoul> let's stick to class backend design unless you have very good reasons not to :)
<anarsoul> s/class/classic
<enunes> right, the algorithm seems to be the common one from every compiler 101
<enunes> it's mostly tricky because of the non-ssa registers and for ppir because of registers written and read in the same instruction
<enunes> and other things that we created ourselves like cloning varying load that end up leaving the original varying load orphan
<enunes> anyway, working on it
<enunes> I don't think that something like DCE should be part of the backend though, dead code doesn't really happen from nir as far I have seen unless our current optimizations create it
<enunes> I think the next step after liveness analysis is to take a look at how to improve the scheduler, it's what I plan to do next after this
<rellla> anarsoul: i tried to debug alpha->ref_value and friends at this place but they are always 0. may i miss anything?
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<rellla> fyi, this is the (a little bit pimped) mesa.log http://imkreisrum.de/deqp/stencil_lima/mesa.log which should correspond to http://imkreisrum.de/deqp/stencil_mali/
<anarsoul> rellla: I'm not sure how to hook it up to mesa
<anarsoul> enunes: that's why we need pre-scheduler and post-scheduler optimizations :)
<anarsoul> we should probably call our ppir lowerings opt/lowering passes and actually do them properly, i.e. on whole program, not on a specific node
<anarsoul> enunes: anyway you likely have a function that does DCE for post-scheduler, so I guess it's all about naming :)
<anarsoul> you can call this function optimization pass