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<naobsd> jmcneill: if you will try SMP on rockchip, current code in rockchip_start.S is useless.
<naobsd> jmcneill: rockchip APs will read/exec code from SRAM
<naobsd> jmcneill: short "jump to our mp startup code" need to be put onto SRAM
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<jmcneill> hi naobsd
<jmcneill> i just checked in an mmc driver, but it doesn't work yet
<jmcneill> if you have any hints please let me know
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<naobsd> jmcneill: oh, super fast... I see, I'll check it
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<jmcneill> out of ideas right now
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<ganbold_> jmcneill: cool, so you've already booted netbsd
<jmcneill> slowly making progress
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<jmcneill> zzz
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<ganbold_> naobsd: what version of ubuntu do you recommend for compiling u-boot?
<naobsd> no recommandation for "compiling u-boot" but I'm usually using ubuntu 14.04 LTS
<ganbold_> ok
<naobsd> cross gcc is a part of android sdk
<ganbold_> ok, before compiline maybe I will try to flash u-boot from link that you gave me
<ganbold_> with fan firefly is almost like small server :) but compared to Dell servers I have its noise is like nothing
<naobsd> it should be ok without fan...
<ganbold_> yeah, it is ok
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<daveNL> hello, my cx 919 ii only connects on b network , not in mixed mode. Any ideas why and can I fix this?
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<jmcneill> morning
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<ganbold_> evening :)
<jmcneill> what's the good word?
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<ganbold_> how is going with rk3188?
<jmcneill> multi-user, root on usb for now, something wrong with my mmc driver
<jmcneill> "sleep 5" returns in about a second so need to figure that out
<ganbold_> already multiuser? very cool
<jmcneill> I think it was more or less doing that when I imported it
<jmcneill> Couple small bugs here and there
<jmcneill> Only thing I've done so far is write a broken mmc driver, make reboot support, and fix a L2 setup bug
<ganbold_> still cool
<ganbold_> I'm trying to build u-boot on linux, not sure how that works
<jmcneill> ah I can help with that
<jmcneill> running fedora 21 here.. i installed gcc-arm-linux-gnu gcc-c++--arm-linux-gnu and binutils-arm-linux-gnu packages
<jmcneill> set CROSS_COMPILER=arm-linux-gnu-
<jmcneill> then you do I think
<jmcneill> make rk3188_config && make
<ganbold_> let me try
<ganbold_> /home/tsgan/gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/arm-linux-gnueabihf-ld.bfd: error: /home/tsgan/gcc-linaro-arm-linux-gnueabihf-4.9-2014.09_linux/bin/../lib/gcc/arm-linux-gnueabihf/4.9.2/libgcc.a(bpabi.o) uses VFP register arguments, u-boot does not
<jmcneill> hm not sure about that toolchain
<ganbold_> probably I did wrong installing 64 bit linux
<jmcneill> shouldn't matter
<jmcneill> I'm running 64-bit fedora
<jmcneill> github/linux-rockchip/u-boot-rockchip you're trying to build?
<ganbold_> yeah
<ganbold_> maybe wrong toolchain
<jmcneill> apparently i don't know how to use git
<jmcneill> rk30xx_config is the target in the u-boot-rk3188-sdcard branch i think
<jmcneill> builds here
<jmcneill> arm-linux-gnu-gcc (GCC) 4.9.1 20140717 (Red Hat Cross 4.9.1-1)
<ganbold_> let me try ubuntu way :)
<jmcneill> GNU ld version 2.24.0-6.fc21 20140613
<ganbold_> oh, ubuntu way works :) so too many toolchains one works one not
<ganbold_> got RK3288UbootLoader_V2.19.01.bin
<jmcneill> do you happen to know how to find cpu freq on rk3188
<jmcneill> i think that's the cause of my delay woes
<naobsd> for u-boot rk3188, use arm-eabi-4.6 in android sdk
<naobsd> for u-boot rk3288, arm-eabi-4.7
<jmcneill> hi naobsd
<naobsd> jmcneill: a9tmr shouldn't be 24MHz
<jmcneill> oh?
<naobsd> jmcneill: what's current cpu clock?
<jmcneill> where did the magic number that was there before come from?
<naobsd> (I couldn't try latest kernel yet)
<jmcneill> apll is cpu clock right? 600MHz
<naobsd> jmcneill: I guess default cpu clock is 297MHz
<naobsd> actually I don't know well about clock and timer, but it seems a9tmr clock is related to cpu clock
<jmcneill> gimpy said the previous value looked way off
<jmcneill> 24MHz lines up with what I saw in datasheet (and what allwinner happens to use as well)
<naobsd> there are some rockchip timer units, hardclock() and timecounter should use it
<naobsd> rockchip timer unit is fixed 24MHz
<naobsd> as far as I know, a9tmr is A9 generic timer
<ganbold_> jmcneill: did you check freebsd one?
<naobsd> 148.5MHz was came from FreeBSD code
<naobsd> it depends on initial cpu clock
<naobsd> (preparing radxa rock...)
<jmcneill> thanks. where do those numbers come from though?
<ganbold_> not sure :) probably I saw it in some linux src
<ganbold_> now I need to find out how to stop u-boot
<jmcneill> should be able to add CONFIG_BOOTDELAY to include/configs/<board>.h
<ganbold_> ah
<naobsd> ganbold_: modify include/configs/rk*
<ganbold_> rk_default_config.h?
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<naobsd> oops, I need to run tools
<ganbold_> /usr/bin/ ignoring invalid character `#' in expression
<jmcneill> unless I'm reading cmu regs wrong, here's what I see
<jmcneill> APLL: 600000000 Hz
<jmcneill> GPLL: 768000000 Hz
<jmcneill> CPU: 200000000 Hz
<jmcneill> AHB: 48000000 Hz
<jmcneill> A9PERIPH: 150000000 Hz
<naobsd> hmm
<naobsd> anyway, rk fixed timer unit should be used...
<ganbold_> interesting, changed PREBOOT, but now it complains
<naobsd> ganbold_: please use officially supported toolchain
<jmcneill> safe to assume PX2 CMU is the same as RK3188 or no?
<naobsd> CRU? no
<ganbold_> now need to try upgrate_tool
<jmcneill> CRU yeah sorry. Do you have RK3188 CRU docs?
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<naobsd> no, only I can see is linux kernel/u-boot code
<naobsd> it's cryptic...
<jmcneill> well, if I use the values above, I get a panic in dwcotg driver at boot
<ganbold_> ./upgrade_tool ul RK3288UbootLoader_V2.19.01.bin
<ganbold_> Loading loader...
<ganbold_> Support Type:RK320ALoader ver:2.19Loader Time:2014-12-27 21:36:18
<ganbold_> Creating Comm Object failed!
<ganbold_> tsgan@tsgan-virtual-machine:~/Linux_Upgrade_Tool_v1.21$
<naobsd> ganbold_: try sudo
<ganbold_> oh :)
<naobsd> you can add
<ganbold_> fun
<ganbold_> Hit any key to stop autoboot: 0
<ganbold_> still
<ganbold_> no boot delay
<naobsd> SUBSYSTEM=="usb", ATTR{idVendor}=="2207", MODE="0666", GROUP="plugdev"
<naobsd> to /etc/udev/rules.d/51-android.rules then run "udevadm control --reload-rules"
<naobsd> then you can avoid sudo
<ganbold_> it is ok, sometimes I forgot sudo
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<naobsd> jmcneill: I think register map is same, but bit mask is different
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<ganbold_> got delay at u-boot :)
<ganbold_> small progress
<naobsd> oops, netbsd.bin doesn't boot :(
<naobsd> only @ABC12-DFG01H1IJKLMZ
<jmcneill> I broke it already?
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<naobsd> I think it's my environment issue...
<jmcneill> naobsd: please use officially supported toolchain :)
<naobsd> I think "./ -j 4 -m evbearmv7hf-el -U tools kernel=ROCKCHIP" should work...
<jmcneill> kidding
<ganbold_> so fastboot -i 0x2207 oem unlock doesn't finish
<ganbold_> maybe works this way
<naobsd> ah, booted now
<naobsd> it seems load to RAM is broken...
<naobsd> fastboot -i 0x2207 oem unlock
<naobsd> fastboot -i 0x2207 oem unlock_accept
<naobsd> run 2 commands
<ganbold_> those command prints ... and never finishes
<naobsd> at first please try my u-boot binary
<naobsd> I confirmed it
<ganbold_> ok
<naobsd> sdmmc0: couldn't enable card: 60
<jmcneill> yep
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<ganbold_> maybe fastboot version is not correct
<ganbold_> which fastboot?
<naobsd> android-tools-fastboot 4.2.2+git201
<naobsd> oh I should try sd boot, not nand boot...
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<ganbold_> cannot find -lusb-1.0
<ganbold_> :) fun
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<ganbold_> fastboot -i 0x2207 oem unlock_accept
<ganbold_> ...
<ganbold_> FAILED (remote: oem unlock not requested)
<ganbold_> finished. total time: 0.003s
<pacopad> Hi guys
<naobsd> ganbold_: did you run 1st command just before 2nd command?
<pacopad> i got ugly network perfs with my rk3288 board , iperf says that
<pacopad> [ 3] 6.0- 8.0 sec 512 KBytes 2.10 Mbits/sec
<ganbold_> yes
<pacopad> what could i check ?
<ganbold_> naobsd: do you zImage somewhere?
<naobsd> ganbold_: well?
<ganbold_> well, wanted to make sure it works
<ganbold_> FAILED (remote: already unlocked)
<ganbold_> so I guess it is unlocked
<naobsd> ganbold_: then you can use fastboot boot
<ganbold_> yeah, I wanted to try linux zImage
<ganbold_> I don't have it now
<naobsd> you may send garbage just for checking fastboot boot...
<naobsd> I have some zImages but I'm not sure which one is "boot correctly"
<naobsd> no warranty
<naobsd> even if it gets oops, "fastboot boot" works.
<ganbold_> ok
<naobsd> jmcneill: did you see sdmmc0: host_ocr 0x00300000 sdmmc0: card_ocr 0x00ff8000 sdmmc0: sdmmc_mem_send_if_cond: error=0, ocr=0x1aa sdmmc0: sdmmc_mem_send_op_cond: ocr=0x40300000
<ganbold_> Linux version 3.18.0-next-20141211+ (fun@build) (gcc version 4.9.2 20140904 (prerelease) (crosstool-NG linaro-1.13.1-4.9-2014.09 - Linaro GCC 4.9-2014.09) ) #1 SMP Sat Dec 20 00:15:29 JST 2014
<ganbold_> seems working
<jmcneill> naobsd: nope
<naobsd> jmcneill: it seems some initial commands are working
<jmcneill> i get an immediate timeout
<jmcneill> did you back out any of my clock changes?
<naobsd> I reverted last one
<jmcneill> which was that
<naobsd> but I still got timeout (60)
<naobsd> well
<naobsd> timer_clk is 24MHz
<jmcneill> you think it should be 148.5?
<ganbold_> interesting now where is boot delay? :)
<ganbold_> boot delay is gone :) fun
<ganbold_> how to boot back to android? it goes directly to linux
<naobsd> jmcneill: I think it's different issue... let me check with latest version
<jmcneill> There must be something I'm missing here. I can't seem to figure out these clocks.
<naobsd> ah, it's somehow related...
<naobsd> with latest change, first sdmmc_io_send_op_cond: ocr = 0 got sdmmc_io_send_op_cond: error = 60
<jmcneill> there are a few reasons for timeout
<jmcneill> either controller sends response timeout irq, or 10 second timer expires (or < 10 seconds if timer freq is incorrect)
<naobsd> well sorry
<naobsd> I misread something
<jmcneill> 600MHz and 768MHz seem correct for APLL and GPLL, not sure how to derive cpu speed from that.
<naobsd> sdmmc_io_send_op_cond always timed out
<naobsd> difference is sdmmc_mem_send_op_cond
<jmcneill> due to irq or after 10 seconds?
<jmcneill> look for 'rint' in output
<jmcneill> sdmmc_io_send_op_cond: ocr = 0
<jmcneill> dwcmmc0: mint 0x100 rint 0x100
<jmcneill> dwcmmc0: mint 0x4 rint 0x4
<jmcneill> dwcmmc0: dwc_mmc_exec_command: rint 0x104
<jmcneill> sdmmc_io_send_op_cond: error = 60
<jmcneill> bit 8 is request timeout
<jmcneill> bit 3 is command done
<jmcneill> _APLL_SET_CLKS(600000, 1, 50, 2, 1, 4, 4, 3, 2, 4, 2),
<jmcneill> from u-boot
<naobsd> dwcmmc0: dwc_mmc_exec_command: rint 0x104
<jmcneill> that matches what i see -- rockchip_pll_get_rate: 0 0x4: nr=1 no=2 nf=50
<jmcneill> APLL: 600000000 Hz
<naobsd> and latest timer clk change should be unrelated
<jmcneill> _GPLL_SET_CLKS(768000, 1, 64, 2, 4, 2, 4),
<jmcneill> rockchip_pll_get_rate: 0x30 0x34: nr=1 no=2 nf=64
<jmcneill> GPLL: 768000000 Hz
<jmcneill> not sure why it's picking up the first gpll rate and the last apll rate
<mmind00> jmcneill: apll + gate_gpll_cpu end in a mux_core which is followed by a divider which then results in the real cpu frequency
<mmind00> jmcneill: but I haven't read the full backlog, so am not really sure what information you actually looking for
<naobsd> mmm, u-boot on sd doesn't work, oops
<naobsd> what happend...
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<jmcneill> mmind00: you're following but i'm not entirely clear on this yet
<naobsd> I want to sleep...
<jmcneill> given apll rate from apll_con0+apll_con1, apply divider from where?
<jmcneill> clksel0_con a0_core_div ?
<jmcneill> a9_core_div
<naobsd> unreliable sd card!
<mmind00> jmcneill: register is: RK2928_CLKSEL_CON(0), mux between apll and gpll is at bit 8 and the core_div at bit 9 with a mask of 0x1f
<mmind00> jmcneill: at least for the rk3188
<jmcneill> ah i was looking at bit 0 for core_div (based on PX2 TRM), sec
<mmind00> jmcneill: there are some differences between the 3066 and 3188 clock trees
<jmcneill> what should I expect the rate to be? given apll of 600MHz anything > 1 will seem strange
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<jmcneill> rockchip_pll_get_rate: 0 0x4: nr=1 no=2 nf=50
<jmcneill> rockchip_cpu_get_rate: clksel_con0=0x42
<jmcneill> CPU: 600000000 Hz
<mmind00> jmcneill: correct ... in the linux kernel it is just used to prevent frequency issues with cpufreq operations
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<jmcneill> thanks
* ganbold_ thinks maybe enough for today for him
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<naobsd> jmcneill: with or without "timer_clk is 24MHz" change,
<jmcneill> I want to fix that.
<naobsd> jmcneill: I can see some response on sdmmc_mem_send_op_cond
<jmcneill> Does 150MHz sound more reasonable?
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<naobsd> jmcneill: and error is
<jmcneill> a9tmr is a9periph right?
<naobsd> dwcmmc0: dwc_mmc_exec_command: rint 0x104
<naobsd> sdmmc0: sdmmc_mem_send_op_cond: error=60, ocr=0
<naobsd> sdmmc0: couldn't send memory OCR
<jmcneill> 104 means the controller sent a timeout irq in response to the sdmmc command
<jmcneill> 1 is "response timeout", 4 is "command done"
<jmcneill> likely the clock is setup incorrectly
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<jmcneill> your uboot sources seem to calculate the divisor based on ahb rate, but there is a separate mmc0 rate
<jmcneill> again, at least in px2 trm
<jmcneill> AHB: 48000000 Hz
<jmcneill> MMC0: 256000000 Hz
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<naobsd> a9tmr is core timer
<naobsd> it's not rk timer unit
<naobsd> well, that u-boot is Rockchip's u-boot ;)
<jmcneill> just trying to figure out exact rate for a9tmr
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<naobsd> clksel_con1 value?
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<jmcneill> not sure, why?
<naobsd> well, sorry
<naobsd> sleepy
<naobsd> good night
<jmcneill> cya
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<jmcneill> mmc works now, yay
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