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<drachensun>
oliv3r: thanks for the link
<drachensun>
I send in a patch that takes care of it
<oliv3r>
cool
<oliv3r>
i think only way to see what you really have is examining memory chips/PCB
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<drachensun>
well if the width doesn't effect anything, who cares is what I figure
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<tuksgig>
wiki says I need to ask on IRC about adding external links. I'd like to upload my new tablet's FEX file to pastebin and link to it from the wiki
<oliv3r>
the width has to do with drive strength; so it is not like 'lets not care and just always set 16bits :)
<oliv3r>
it'll use more power and might push the chips to hard
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<mnemoc>
moin
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<oliv3r>
mnemoc: g'day
<oliv3r>
how are things?
<oliv3r>
tuksgig: don't usepastebin for things like that. you don't have to put your fex on the wiki; send it to the mailing list or better yet, send it as a patch to go into the sunxi-boards git
<tuksgig>
ok thanks. I did send it to the mailing list
<mnemoc>
oliv3r: fine... coding looking at the lake of an small wood near the hostel.
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<mnemoc>
love this city
<blunden>
anyone happen to know how to boot a marsboard a20 into FEL mode? can it be done without a specially prepared sdcard?
<blunden>
trying to dump script.bin and the bootinfo/meminfo from it
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<utente>
hi guys. there is a unique serial number hard coded into A10? i wish to read it on my cubieboard.
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<mnemoc>
utente: in the SID, but it's not always there
<utente>
mnemoc, what is SID? Serial IDentifier?
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<utente>
how can i read it? link to howto are wellcommed :)
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<utente>
mnemoc, there is no soiuce code to read those memory locations?
<oliv3r>
mnemoc: ohh sounds beatiful!
<oliv3r>
mnemoc: berlin still?
<oliv3r>
utente: nope, that's READ-ONLY
<oliv3r>
blunden: should have a fel button like a10, if not, the fel key-combo should work. Otherwise you can hook up uart and press '2' during boot0/1. I'm a little puzzled how you plan on dumping those things from fel-mode though ;)
<blunden>
oliv3r: I may be misunderstanding the first section in the link but it seemed to me to suggest that it could be done like that http://linux-sunxi.org/Submitting_Boards
<oliv3r>
blunden: it does not mention fel mode though, does it?
<blunden>
"This method uses the soft FEL mode to allow easy extraction of both needed DRAM configuration and script.bin."
<oliv3r>
ah i see yes
<oliv3r>
that's the new method, i haven't used/tried that, but shoudl work if you press '2' via uart
<oliv3r>
or the keypresses as listed in that section
<oliv3r>
if that doesn't work, booting stock android is probably 10x easier
<blunden>
I don't have serial set up
<oliv3r>
script.bin is stored on /dev/block/nanda or the likes
<blunden>
ok
<oliv3r>
and ram header you can obtain by running a10-meminfo-static
<blunden>
how would I flash that without FEL mode though?
<oliv3r>
bootinfo from tool basically :)
<oliv3r>
skip feldump
<oliv3r>
start at the 'boot info from tool' section
<oliv3r>
its probably easier
<blunden>
how would I flash the android firmware? it isn't flashed with android from the factory
<blunden>
I thought that required livesuite still and I thought that only worked in fel mode
<blunden>
oliv3r: ---^
<utente>
oliv3r, yes, in need a program to read that's READ-ONLY.
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<oliv3r>
blunden: you want stock firmware, be it android dor anything else. The goal of the exercize is to extract the script.bin from nanda, should exists no matter what OS you boot. a10-meminfo-static can be run on android OR linux, it just reads registers, under linux its even easier :p
<oliv3r>
utente: unfortunatly, we do not have a program for it yet, well we do but that's in the mainline kernel ;) using the u-boot console is currently our only option
<utente>
there is a souce devmem2 that do what i need.
<utente>
of course will be better to have it blobbed inside /proc/cpuinfo
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<sanzoghenzo>
Hi all,newbie here, I've got a question about mali-400mp: does it support 15khz output, like CGA mode?
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<oliv3r>
utente: we're not sure yet where to put it, but in mainline there's a driver specific for this purpouse with a sysfs entry for it
<oliv3r>
sanzoghenzo: no idea, libv or ssvb may answer that
<libv>
sanzoghenzo: that is not up to the mali
<libv>
sanzoghenzo: mali is a 3d core only
<libv>
sanzoghenzo: the sunxi disp engine is what you should be looking at
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<ssvb>
sanzoghenzo: different horizontal sync frequencies are supported via divisors, but I don't know the exact practical limits
<sanzoghenzo>
ssvb: using a xor gate to mix hsync and vsync, and an amplifier for the video signal
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<sanzoghenzo>
ssvb: it's a known hack in the mame coin op world, and works well with ati radeon and softwares that force CGA or EGa modeline
<oliv3r>
hansg: i can't apply your patchset to 3.4; i'll pull yours then
<ssvb>
sanzoghenzo: would trying a CGA modeline with HDMI monitor help (because it is the most easy test)?
<ssvb>
sanzoghenzo: I'm just not dealing with the hardware and have no clue about the required hardware tweaks
<sanzoghenzo>
ssvb: that's ok, thanks for the help. libv pointed me in the right direction looking at disp_clk.c I don't see a compatible CGA mode (320x200)
<libv>
sanzoghenzo: the current implementation of the driver for disp is quite horrid
<ssvb>
sanzoghenzo: these are definitely no all the supported video modes
<libv>
sanzoghenzo: the disp engine itself is algorithmically programmable though, and allows for many many modes
<libv>
but that requires an almost complete rewrite of the driver
<ssvb>
sanzoghenzo: a very easy test is to take a modeline, convert it to EDID blob format and inject into the EDID support code from the linux-sunxi kernel
<libv>
ssvb: that sounds backwards
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<libv>
ssvb: surely a few steps down the road would be much simpler
<ssvb>
libv: I said this was an easy and straightforward way :)
<libv>
how does one convert a single modeline to an "edid blob format"
<ssvb>
libv: required no efforts and eliminates the possibility of screwing up something
<libv>
and keep in mind that i wrote the edid -> modelist code for X
<ssvb>
libv: some conversion tools exist
<libv>
really?
<libv>
who would spend time on that, why would one need such a thing?
<libv>
why not just feed modelines directly to the hw
<libv>
err, driver
<ssvb>
do you mean take the numbers from the modeline and put them as is into some variables?
<libv>
ssvb: i still have to see hw that takes EDID directly.
<ssvb>
without doing any arithmetics ot adjustment
<libv>
so somewhere along the line, edid is converted to something useful
<ssvb>
the software in linux-sunxi kernel takes EDID directly, converts it into what the hardware wants and writes to the right hardware registers
<ssvb>
that's the whole point
<libv>
key words there are: software, converts
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<blunden>
oliv3r: yes, I understand that. among the software and documentation (most of it in chinese) they also provided an android 4.2.2 image. the board supposedly ships with a very simple environment originally and I assume it doesn't have ssh or telnet enabled
<utente>
getting headhache on cubieboard remind me my glorious teenager day when I get troubles on Z80 :-)
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<libv>
ssvb: if i had thought like that, we would still all be using BIOSes to set a limited amount of preset modes
<ssvb>
libv: wrong, if everyone wanted to do every simple test in a time consuming and convoluted way, very little of the real work would have been done
<libv>
again, if someone like me wouldn't come along and bring some order, we would still be living in cages.
<ssvb>
:)
<libv>
the modeline is the simplest form of timing information, edid is a quite more convoluted form, which provides way more information that just the information contained in a single modeline
<libv>
someone just hasn't gone and poked at this driver properly
<ssvb>
someone just did not have to
<ssvb>
it's up to another someone
<libv>
and therefor took two steps back into the cave
<ssvb>
I'm not sure what you are trying to argue about, makes no sense to me
<libv>
soon someone will write up a wiki page on how to do this, and it will spread all over the forums
<libv>
and then people will end up complaining about how crap the hw is and that it only accepts raw edid
<libv>
because that's how this sort of bs works.
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<libv>
and we now live in a world that knows how to multiply bullshit better, due to the whole android thing
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<sanzoghenzo>
hahaha sorry for bringing an hot topic here ;) So, since I don't have olinuxino yet, I should buy it and trying to write a new driver (with my poor programming skills it would take ages) or move on to another platform...
<techn__>
you should be able to try that with fbset
<libv>
sanzoghenzo: yes, it will take a _lot_ of work to make the display driver do anything useful
<oliv3r>
hansg: i have to redo the patch set, rebasing/re-applying is failing horribly :S
<oliv3r>
blunden: and you can't hook up keyboard + monitor either? Because without uart, keyboard or monitor it's quite hard to use the board
<oliv3r>
sanzoghenzo: well you have 3 options presented to you, so choose wisely. (Fbset, modeline, edid-blob)
<sanzoghenzo>
Thanks a lot everyone, now at least I know there's a chance to make it work... if not, I'll substitute the arcade monitor with a computer one :) thanks again, have a great day!
<ssvb>
sanzoghenzo: as I said before, if you are interested in some particular modeline, I can try it with a HDMI monitor in a matter of a few minutes (or as much as needed to re-compile the kernel)
<ssvb>
sanzoghenzo: of course, I guess VGA would have been more interesting for you, but it may need to do a _lot_ of fixes to the kernel to make it _right_ as libv noted
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<blunden>
oliv3r: the last time I hooked it up tp my computer monitor (via an HDMI to DVI adapter) it didn't get any output
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<blunden>
the problem is I don't know how it is supposed to behave with what's flashed from the factory
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<sanzoghenzo>
ssvb: sorry I misunderstood what you wrote before (Italian guy here), sure it can be a good start. I don't have the real hardware for now, but i found this: http://www.geocities.ws/podernixie/htpc/modes-en.html#avga a lot of modelines!
<ssvb>
sanzoghenzo: just select one! :)
<sanzoghenzo>
ssvb: let's se if this works: Modeline "320x200_60,0Hz 15,7KHz (60Hz)" 6.162 320 328 357 392 200 221 224 262 -hsync -vsync
<libv>
changes that an lcds controller supports this are limited
<libv>
although... what is vga textmode again...
<sanzoghenzo>
libv: for a 80x25 it's 720x400
<libv>
ah, right
<libv>
so cga timing might have long dropped from the modes that an lcd's controller might know
* libv
keeps some CRTs around as they are irreplacable for display work
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<oliv3r>
blunden: so how do you use your board now? I guess they assume by default that you use a uart; your monitor can't do more then 1920x1080 or edit detection most likly fails etc etc, many things that can go wrong actually
<blunden>
oliv3r: I just recieved the board
<oliv3r>
ah, well uart probably works just fine :)
<oliv3r>
so you kinda need it ;)
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<ssvb>
sanzoghenzo: [ 3.120000] disp_clk: Could not find a matching pll-freq for 6160000 pclk
<ssvb>
sanzoghenzo: let's see what kind of PLL dividers are available and whether we can get anything close to 6.16MHz pixel clock
<libv>
heh, that's several days with a CRT on each of the major chip generations, to find out the real life limits of a pll
<ssvb>
well, looking in the manual first would have been a good idea: "The PLL7 output range is 27MHz~381MHz" :)
<libv>
base clock is?
<techn__>
ssvb: and max div?
<libv>
because that 27MHz lower limi tshould exclude 640x480 already
<Turl>
mripard_: ping
<mripard_>
Turl: pong
<Turl>
:D
<Turl>
mripard_: hi :p
<techn__>
libv: pal/ntsc are ~15Mhz?
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<techn__>
so I doupt
<ssvb>
libv: right, base clock is 270MHz or 297MHz based on bit 14
<mripard_>
Turl: hi :)
<ssvb>
libv: and 27MHz~381MHz range only applies to "integer mode"
<Turl>
mripard_: remember the sram driver?
<mripard_>
hmmm, more or less, what about it ? :)
<Turl>
mripard_: I can't make it work, linux somehow decides the virtual mapping for the sram is somewhere in 0xesomething
<Turl>
mripard_: when afaik we're using 1:1 mappings right?
<mripard_>
you mean that the physical and virtual addresses are the same?
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<Turl>
mripard_: yes
<mripard_>
(by 1:1 mapping?)
<Turl>
mripard_: indeed
<mripard_>
nope
<Turl>
mripard_: but ranges is empty, and the docs say so o.O
<mripard_>
it's dynamically created somewhere at the end of the virtual memory space
<mripard_>
so your 0xeXXXXX looks ok
<mripard_>
ranges is about physical addresses
<mripard_>
so you have no translation of the physical addresses
<mripard_>
but Linux takes these physical addresses and maps them to a virtual address around 0xe or 0xf
<Turl>
I guess that explains it then
<Turl>
I was reading it as the translation between CPU (which I imagined was virtual addr) and the device (physical)
<mripard_>
nope
<mripard_>
ranges is really about the CPU address space, and another address space on a bus
<Turl>
mripard_: then the question is, why doesn't it work when mapped on 0xesomething? :)
<mripard_>
if you prefer, we could very well define our "soc" bus with a range starting at 0x01c00000
<mripard_>
and then, say, the EMAC, would have reg set to 0xb000
<mripard_>
Doesn't the SRAM have some clocks that you need to ungate?
<mripard_>
and I think I've seen some patches about the sram driver lately...
<mripard_>
2s
<Turl>
clocks hm, good question :)
<mripard_>
is it probed?
<Turl>
the driver? yes
<Turl>
I found two sdram clocks, let me try that
<ssvb>
sanzoghenzo, libv: indeed, looks like checking whether this arcade video mode stuff can work needs a real analog CRT monitor and playing really a lot with the divisors
* ssvb
is happy not to have a CRT monitor anymore
<libv>
it's a tedious undertaking as well as needing a CRT
<libv>
but everything involving the cleanup of the disp driver is going to be tedious
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<sanzoghenzo>
ssvb, libv: thanks a lot for your help. Since I don't own an arcade monitor yet, I can bypass this problem with a brand new hdmi monitor :P; and once l'll want to try a pure arcade experience I'll get in touch with all the hardware at hand :)
<Turl>
mripard_: no luck :(
<mripard_>
how are you testing it?
<Turl>
mripard_: writing something with devmem and then reading it back
<mripard_>
like for the restart/poweroff hooks, I'd expect the kernel to do something before a suspend, like disable some clocks, the timers, and so on
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<Turl>
mripard_: maybe it's suspending the console :p
<Turl>
I see emac is asleep-ish
<mripard_>
and yes, it's suspending the console, so it might still be alive
<Turl>
mripard_: I guess I'll ask in #armlinux then
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<mripard_>
Turl: yep, you should probably ask someone that has a real working experience with it :)
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<mripard_>
you can ask heiko stubner if he's around
<mripard_>
he has used it recently for the SMP patches for rockchip
<mripard_>
he'll probably know
<fredlyn>
G'morning. For A20 there is a linux OS img only for console (no X) ?
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<hramrach__>
fredlyn do you want a headless image or ?
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<hramrach__>
currently the a20 support should be beasically usable but only images do include X
<hramrach__>
doing headless image is as simple as rebuilding hte kernel with disp disabled
<fredlyn>
I'm used with XUBUNTU alternate iso where I've installed a linux with only console (no graphics). Now I would like to know if there is a linux version for cubieboard2 with same feature and where I can use apt-get install to install extra packages
<fredlyn>
for example gcc compilators for arm
<hramrach__>
no, currently the image about to bne released is Fedora 19 desktop image
<hramrach__>
it does include X but you can remove it if you like ;-)
<Turl>
mripard_: ok, working now :)
<fredlyn>
the fedora image can be accesses to console with TTL ?
<fredlyn>
just I'm not used with X and I don't have an extra HDMI monitor to use
<fredlyn>
*accessed
<fredlyn>
I've cubieboard20 with USB->TTL converter (rich package)
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<Turl>
fredlyn: most if not all can be accessed via UART
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<Turl>
but I don't think the fedora image supports A20 yet
<fredlyn>
ah....
<fredlyn>
ok...
<fredlyn>
I will wait some future support
<fredlyn>
thank you
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<mripard_>
Turl: so it was the exec thing?
<Turl>
mripard_: yup
<mripard_>
Turl: and the guy who had the answer was 1m away the whole afternoon :)
<Turl>
mripard_: minute or meter? :P
<mripard_>
meter
<Turl>
heh
<Turl>
mripard_: thank him IRL for me :)
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<mripard_>
Turl: I'm not at the office anymore, but I will :)
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<Turl>
mripard_: do you have any experience with the pm framework?
<mripard_>
none :S
<Turl>
I'm wondering where is stuff like irqs handled
<Turl>
because AW force disables all of them on their code and then turns on the ones they want
<mripard_>
I'd expect every device to disable them when the pm callbacks are called
<mripard_>
just like you should disable the clocks and so on
<Turl>
mripard_: and who should take care of leaving some on?
<wingrime>
Turl: what problem add it to mainline ?
<Turl>
wingrime: multiplatform
<Turl>
I think it would be an issue
<wingrime>
Turl: do you realy read tcm.txt header ?
<wingrime>
Turl: - Idle loops where all external RAM is set to self-refresh retention mode, so only on-chip RAM is accessible by the CPU and then we hang inside ITCM waiting for an interrupt.
<wingrime>
Turl: it defenetly for it
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<wingrime>
Some ARM SoC:s have a so-called TCM (Tightly-Coupled Memory).
<wingrime>
This is usually just a few (4-64) KiB of RAM inside the ARM
<wingrime>
processor.
<wingrime>
it does not matter omap it or not
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<wingrime>
so we have framework for it so you could place any fuction on SRAM and when kernel will unpacks that function will be placed there
<wingrime>
one thing we need configure it right way
<wingrime>
I not sure about stack behavior in __tcmfunc
<wingrime>
stack also must be in TCM too
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<wingrime>
Trul: it looks good for dma self refresh suspend ?
<wingrime>
*dram
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<Black_Horseman>
Speres
eebrah|away is now known as eebrah
<oliv3r>
so I e-mail Greg because I can't get it to work, to which he happily replies, it should
<oliv3r>
Turl: sdram != sram
<ssvb>
hi wingrime
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<oliv3r>
wingrime: pong
<wingrime>
olvi3r: have you successed whan tryed gate on cedar ?
<oliv3r>
i have not done anything with cedar except follow your progress
<oliv3r>
i'm over my head with work atm
<wingrime>
ssvb: still wait you fix sunxi fb for a13 :)
<wingrime>
olvi3r: I about try tun on cedar manualy setting up pll and gate
<ssvb>
wingrime: I don't have A13, and don't know what needs to be fixed there :) Still I got some other interesting information
<wingrime>
ssvb: for example
<ssvb>
wingrime: have you figured out how to use yuv overlays with sunxi disp?
<wingrime>
ssvb: I think like any other layer
<wingrime>
ssvb: conversion must be automactic according a13 manual
<wingrime>
*automatic
<ssvb>
yes, I just remember you complained that you had some troubles with it for testing cedarx decoded video
<wingrime>
ssvb: It must not cost many times
<wingrime>
ssvb: Also I thinking about that cedarx decoder must be part kernel disp drm driver
<oliv3r>
wingrime: btw, I don't think cedar should be part of disp at all; what if you want a headless machine, but want to use it as a dedicated transcoding machine :)
<ssvb>
wingrime: I have just implemented XV support, you could probably use it for inspiration and/or some ideas
<oliv3r>
wingrime: also, did you read my question with regards to deinterlacing?
<oliv3r>
ssvb might know too
<wingrime>
ssvb: it support VUY ot YCrCb
<wingrime>
?
<ssvb>
wingrime: just planar YUV420
<wingrime>
olvi3r: can you repeat
<wingrime>
ssvb: nice
<ssvb>
wingrime: but if I understand it correctly, cedar uses some sort of tiled packed format
<jukivili>
techn_: so about musb.. I just got host mode working (kind of)
<techn_>
jukivili: oh.. sounds really nice.. they are really compatible? :D
<ssvb>
wingrime: also it looks like the disp ioctls involved in this process can sometimes deadlock my system when stressing this stuff a bit :)
<wingrime>
ssvb: 4:2:0
<wingrime>
ssvb: or 4:2:2
<jukivili>
techn_: sw_hcd and musb appear to be based on same code base (...or sw_hcd is based on musb)
<oliv3r>
i tried to add all info to the paste i thought was relevant
<wingrime>
ssvb: I still wait mnemoc when he review all maillist stuff
<oliv3r>
as far as I see, struct bin_attribute **bin_attrs; is a pointer to an array (i would have defined it as *bin_attrs[] to be more specific, but hey)
<ssvb>
wingrime: :)
<oliv3r>
wingrime: i think mnemoc wants to 'start fresh' import hansg's wip/for-amery tree
<oliv3r>
and then ask people to resend patches based from that
<Turl>
oliv3r: drop the const on paste like 7 and it should work
<Turl>
line*
<oliv3r>
ok fair nuff
<wingrime>
ssvb: first thing that I need to do - merge cedar for a13 and a10
<oliv3r>
but why doesn't it say 'not a constant' like it did before
<Turl>
oliv3r: I dunno :)
<ssvb>
wingrime: makes sense, we also need to check what's up with cedar on a20
<oliv3r>
/silo/build/sunxi-bsp/linux-sunxi/drivers/misc/eeprom/sunxi_sid.c:99:2: warning: initialization discards 'const' qualifier from pointer target type [enabled by default]
<oliv3r>
if wingrime would have received his cubieboard2 allready :(
<wingrime>
oliv3r: still not
<oliv3r>
wingrime: :(
<wingrime>
oliv3r: russian mail knowable slowpocke
<oliv3r>
Turl: i removed the const on line 1 too
<wingrime>
*known
<oliv3r>
wingrime: but THIS slow? it's been 2 months now?
<oliv3r>
and shenzen is so close to yakaterinburg
<oliv3r>
Turl: lets' boot it up
<wingrime>
olib3r: it go over moscow anyway
<Turl>
oliv3r: I don't have mine yet either :P
<Turl>
oliv3r: it has a uSD slot right? I need to buy some new ones
<ssvb>
I doubt this :) if these bits were interpreted as part of the address, then cedar would be accessing wrong memory locations already
<wingrime>
mpeg use 0x5
<wingrime>
ssvb: mix flags and offset in single register
<wingrime>
ssvb: it realy look strange at first look
<ssvb>
yeah, and it means that the offset only has 28 bits
<ssvb>
2^28 = 256MiB, too bad for us
<wingrime>
ssvb: as cedar have internal dma it can be internal dest device selector
<oliv3r>
yay, finaly uart from my tablet via uSD cable
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<wingrime>
ssvb: are you sure g2d use 36 bit ? I doubt this becose in optimization step (logic optimization) whan you synteze ASIC logic not used lines simply will removed
<oliv3r>
wingrime: or it's copied IP
<wingrime>
ssvb: also if offset 28 bit so why hi-bists not zero
<wingrime>
oliv3r: IP it usualy verilog code that means code must be converted to logic scheme , with optimization
<ssvb>
wingrime: check the A10 manual and search for "Input DMA start address high 4bits register"
<ssvb>
wingrime: the low 32-bits of the physical address for G2D input DMA are stored in another register
<Turl>
oliv3r: nice :) get debugging ;)
<oliv3r>
yeah!
<ssvb>
wingrime: we probably can just ignore this high bits register on the Allwinner hardware, but it nevertheless exists
<wingrime>
ssvb: a-15 can address 36?
<wingrime>
cortex a15
<wingrime>
but we have 32-bit cpu ...
<ssvb>
not looked into this yet, I still don't have any arm device with that much memory :)
<oliv3r>
finally i can start booting 3.4 kernels
<oliv3r>
just need to test touchscreen driver; as that was a blob :S
<blunden>
oliv3r: it seems the issue might that the power supply is too weak. it apparently comes flashed with android from the factory, despite what the site said
<oliv3r>
blunden: ahhh, a20 wasn' tit?
<oliv3r>
blunden: i had the same issue on my olimexino, and weak power caused all sorts of issues
<oliv3r>
e.g. i couldn't power it via OTG
<oliv3r>
powering it via the included jack with 12V 5A was fine
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<blunden>
oliv3r: yes, A20. it seems it doesn't boot up properly because of it
<wingrime>
ssvb: witch problems when it must be at first 256 MB ?
<ssvb>
wingrime: VLC just does not play videos properly
<wingrime>
ssvb: more stange, that only source buffer have such mask
<blunden>
oliv3r: basically it gets enough power to sort of power up and get detected by my computer but it never boots beyond that. now I'm basically waiting for the new power supply to arrive
<blunden>
thanks for your help earlier btw :)
<wingrime>
ssvb: output buffers have no any mask
<oliv3r>
blunden: i was lucky to have an old PSU from a scanner
<oliv3r>
blunden: but you have no other PSU? nothing at all?
<wingrime>
blunden: you always take red and black wire from PC
<wingrime>
*can take
<oliv3r>
red is 5V
<wingrime>
black - gnd
<blunden>
oliv3r: no, but that's fine. I'll just wait
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<oliv3r>
so yeah, you could jeri rig 5V like that; but the power jack takes upto 16V i think
<blunden>
I'm really not in a hurry so it's not worth ghetto-modding a cable like that :P
<blunden>
oliv3r: what do you use your a20 board for btw?
<oliv3r>
kernel dev
<oliv3r>
though using my a10 now mostly
<oliv3r>
done some u-boot work for a20 though
<blunden>
how well does the current a20 kernel work?
<oliv3r>
not yet :)
<blunden>
not at all?
<oliv3r>
hansg has been busy porting sun7i to our 3.4
<oliv3r>
and mainline shouldn't be too much work; but no time available
<blunden>
but the current code does work I assume, even if it's not as neat as it could be?
<blunden>
I'm not looking to do anything advanced with it
<oliv3r>
oh, yeah 3.3 kernel from AW "works"
<oliv3r>
and 3.4 is progressing nicely
<techn_>
3.3 code is missing community fixes
<techn_>
atleast most of them..
<blunden>
yeah, I'll be sure to switch over to that 3.4 kernel when it's a little closer to being "stable"
<blunden>
don't you have to get rid of that script.bin stuff before mainlining btw?
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<techn_>
mainline doesnt talk with script.bin :p
<oliv3r>
mainline is without script.bin allready :)
<blunden>
so are AW workink with you on this or are you just doing it entirely as a community effort?
<blunden>
I mean seeing the success you've had this far in mainlining stuff it would seem easier for them to just switch to the mainlined implementation and continue in that fashion
<Turl>
hey blunden
<blunden>
Turl: I figured I'd see more CM people in here sooner or later :)
<Turl>
blunden: haha
<Turl>
blunden: I'm doing mainlining work mostly these days though
<blunden>
I saw RaYmAn in a channel log earlier
<blunden>
allwinner stuff?
<Turl>
blunden: yep
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<Turl>
ouch
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<theOzzieRat>
is stage/sunxi-3.4 the best branch to test a10s a20 boards with?
<techn_>
theOzzieRat: that's only branch which supports a20 at some level
<techn_>
dunno about a10s support
<utente>
A10 support is good
<techn_>
utente: a10 != a10s
<theOzzieRat>
thanks, I'll give it a bash. I see some 10s commits in the branch
<utente>
techn_, ops, i sippose "s" menas plural, sorry
<theOzzieRat>
I have an a10s working but it nic is unreliable
<techn_>
utente: you are not the first :D
<utente>
eheh
<utente>
so better use "S" than "s"
<utente>
A10S is more clear .)
<techn_>
theOzzieRat: there may be some fixes @ ML
<techn_>
hansg send some patches today
<theOzzieRat>
yep, being watching that. nothing new for the "A10S" for a while though