<Turl>
granite_crusher: it's like 3 lines that you need to add :)
<Turl>
granite_crusher: just look at other dts using that same rtc, grep is your friend
<arokux2>
Turl: why aren't you submitting PLL6, I could at least push usb clocks
<Turl>
arokux2: because I'm lazy, I've been busy and I don't do this for a living :)
<Turl>
arokux2: but as you've been pushing quite a bit I'll send them after dinner :)
<arokux2>
Turl: thanks :) you've been doing all the possible stuff still :p like 3.10 backporting :p
<arokux2>
for the future, I think the clocks must be implemented by the person who writes drivers
<arokux2>
Turl: there are some central clocks, but PLL6 should have been left.
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<granite_crusher>
I got confused if it is NXP pr philips (the same module pcf8563) and I am not sure if address have to be 0x81 or 0x51(provided in dts'es with "same" rtc)
<granite_crusher>
*or
<Turl>
arokux2: yeah, I hate schedules :P
<Turl>
granite_crusher: I think it's nxp's?
<granite_crusher>
Turl: but in kernel it was philips?
<Turl>
granite_crusher: the one I saw was nxp I think
<hno>
arokux2, sprinkle the code with printks and compare results on 3.4 and mainline?
<granite_crusher>
other thing in fex by olimex addres is 81
<arokux2>
hno: not sure at which places.. all over ehci-hcd probably. I've written yet another e-mail to the maintainer, maybe he has some clues. so far he hadn't any. :(
<Turl>
granite_crusher: drivers/rtc/rtc-pcf8563.c has a nxp compatible
<Turl>
arokux2: 81 in base 16 is 51
<Turl>
err granite_crusher ^
<Turl>
granite_crusher: fex takes them in decimal from what I recall
<granite_crusher>
ok :)
<hno>
arokux2, also compare sunxi-3.4 to mainline-3.4. AW have hade patches here and there...
<hno>
plus sunxi-3.4 is infested with lots of google changes.
<arokux2>
hno: I doubt google did something special to ehci stack
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<hno>
arokux2, I don't know.. they did mess quite a bit with other usb parts. But I guess most of it is otg related.
<arokux2>
thanks hno
<arokux2>
good night all.
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<acr>
hi
<acr>
who know about CedarX engine?
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<Turl>
acr: wingrime
<Turl>
night
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<acr>
wingrime, hi
<acr>
u know howto use CedarX with avconv?
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<tgaz>
is anyone able to compile the sunxi pwm driver? i get a compilation error for the include file.
<tgaz>
-#include <pwm-sunxi.h>
<tgaz>
+#include "pwm-sunxi.h"
<Cubear>
tgaz: get a newer kernel
<tgaz>
second question; patches to the MUSB driver... should that go to lkml or how does it work?
<Cubear>
there's a fix in 3.4.61
<tgaz>
Cubear, how is linux-sunxi/sunxi-3.4 tracking upstream?
<tgaz>
is git pull on that enough?
<Cubear>
I did a git clone on the stable 3.4 branch and it compiled fine
<tgaz>
yeah, i see the fix. cool
<tgaz>
that's actually the only change. ;)
<Cubear>
btw if anyone's interested about that cross compiling problems I've been having friday... the ubuntu 3.04 cross compiling toolchain works fine.
<tgaz>
have you been able to compare the output binary?
<Cubear>
I didn't compare it I just ran it without the ld symlink in /lib and it worked.
<Cubear>
I think it could differ significantly because I used a newer compiler. On debian it was gcc 4.4.x, on ubuntu it's gcc v4.7.x
<Cubear>
gcc version 4.7.3 (Ubuntu/Linaro 4.7.3-1ubuntu1)
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<tgaz>
still sounds more like (linker) settings than gcc. but i'm glad it worked out (and that you are sharing. :)
<Cubear>
That toolchain on emdebian how-to page needs to be updated
<Cubear>
erm you're right. it's the newer toolchain, not the compiler
<Cubear>
seems like I'm still not fully awake yet... just woke up 15 mins ago
<steev>
tgaz: you can run ./scripts/get_maintainer.pl -f path/to/file to see who all should be CC'd
<steev>
indeed, i was actually trying to find that page
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<tgaz>
cute. never used git send-email before. of course my VCS has half an email client in it.
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<n01>
'moning
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<djahma>
has anyone got an address to share, where I could find help to resolve "Error 2" kernel compilation error? I've been trying to compile a kernel for my tablet for 2 months now. At the moment I'm struggling to go past LD net/built-in.o
<djahma>
All the literature I can find on internet is for arm boards, and very rarely for tablets, consequently, touchscreen wifi bluetooth are not working
<djahma>
I've managed to get touchscreen working but it is very buggy
<djahma>
in short, I'd like to know how to investigate the "make: *** [sub-make] Error 2" error message?
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<n01>
djahma: compile with V=1
<djahma>
n01: thanks. it seems there are modules.order problems
<djahma>
actually, it is just writing the name of the modules to the net/modules.order file. V=1 is not giving me more information about why compilation is failing
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<n01>
which kernel are you using.
<djahma>
sunxi 3.4
<n01>
what CC?
<djahma>
CROSS_COMPILE=arm-linux-gnueabihf-
<n01>
paste the promlem somewhere so we can take a look
<djahma>
using V=2 I could see there was a problem with wl127x-rfkill. Maybe this is the culprit
<n01>
are you using the correct defconfig?
<djahma>
I used sun4i_defconfig first. The kernel worked but no touchscreen wifi bluetooth etc. So I am compiling again and again with modifications to this config, in order to add more modules, in particular these modules I found after "ls /sys/" in android
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<n01>
djahma: disable the wl127x-rfkill module
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<oliv3r>
got 2 days of backlog reading
<oliv3r>
:S
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<djahma>
n01: I disabled it, sorted another problem and the kernel compiled correctly. After playing with modprobe in my tablet, I still couldnt get wlan0 recognised
<djahma>
This is strange to see how android invaded the mobile world, and how linux is yet so inadapted to it. They are so closely related though!
<oliv3r>
Turl: it's a merge, so you get 'forgot to pass -m otpion' thing
<oliv3r>
arokux2: turls android/CM work
<arokux2>
oliv3r: ok..
<Turl>
arokux2: oliv3r: that's not mine, that's allwinner's
<Turl>
oliv3r: git show 03b054e|patch -p1; git commit -a -c 03b054e ? :P
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<oliv3r>
ah! i did > file.patch
<arokux2>
Turl: thanks for pushing clocks, wasn't expecting it so soon.
<oliv3r>
Turl: if i backport the pinctrl stuff, i can ignore and break the other pinctrl's right? or do we have to pull in all possible changes for those files aswell?
<Turl>
arokux2: I told you I'd do so after dinner didn't I? :)
<Turl>
oliv3r: ask mnemoc :p
<arokux2>
Turl: yes, and you've kept your word
<oliv3r>
Turl: i'll do a partial cherry-pick for now, only using the pinctrl core + sunxi stuff
<mnemoc>
been sunxi-3.10, I think we should backport as little as possible to get a working sunxi-dts which can be used in 3.10 infrastructure as "equivalent" to master's as possible
<mnemoc>
but not backport non-3.10 infrastructure/frameworks
<oliv3r>
mnemoc: the thing is, there where some pinctrl core changes, i've backported the core bits + sunxi bits; but the 'others' fail to apply
<oliv3r>
so i just stripped those out, as they are of no interest to us
<mnemoc>
ack
<mnemoc>
it's a sunxi tree anyway, f* the rest of the arm world :p
<oliv3r>
and it's just noise to 'fix' rockchip pinctrl stuff :)
<oliv3r>
:)
<oliv3r>
bah fails to build :)
<mnemoc>
rockchip fixes aren't relevant to us
<oliv3r>
exactly
<oliv3r>
anyway, bbl
<oliv3r>
gotta reboot server
<oliv3r>
got a ton of stale nfs bits, upgraded kernels etc
<oliv3r>
was posponing it for weeks :)
<mnemoc>
*g*
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<oliv3r>
so bbl :)
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<Turl>
I should reboot mine too, I upgraded the kernel the other day
<WarheadsSE>
So, since I know you guys are fooling with & without DTS @ the board files, maybe someone can shed some light for me.
<WarheadsSE>
I am working on a non-sunxi board, but the damned -setup.c is driving me nuts.
<WarheadsSE>
This POS has flags that need to be passed to the eth PHY before reset, and the driver appears to be able to do this if you provide phydev->dev.of_node.properties with a 4xu16 array
<WarheadsSE>
Now, the damned thing is not yet DTS capable (uboot and bullshit), but I need to get this PHY to it.
<WarheadsSE>
I have 2 choices, 1) manage a way to get it to DTS or zImage+dtb, 2) correctly hand-make the mentioned data piece in the -setup.c
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<WarheadsSE>
I am at the point where I have what appears (logically) to me a correct and hand made phydev->dev.of_node.properties pile made in the -setup.c, but I am getting complaints about initializer element is not constant in setting up the device.of_node value.
<WarheadsSE>
So, either I am missing something, and/or my understanding ot the object setup is missing
<WarheadsSE>
Anyone that can offer input, that would be mice.
<WarheadsSE>
s/mi/ni/
<Turl>
WarheadsSE: I don't think you can magically make a hand made of node and stuff it there
<Turl>
WarheadsSE: can't you just edit the net driver to do fixup on the non-OF case for your board?
<Turl>
WarheadsSE: board files seem to use phy_register_fixup_for_uid() to get their phy fixup done
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<WarheadsSE>
I suppose I can.. won't be fun because it is the mv643xx
<WarheadsSE>
I dug around and intot he drivers/net/phy/marvell.c
<WarheadsSE>
Turl: looks like the imx6q variants have some
<wingrime>
Turl: good news, ISP is Image Signal Processor , can do tumbnails
<buZz>
accelerated thumbnailing? :P sweet
<buZz>
also for video?
<wingrime>
buZz: h264 hw encoding
<WarheadsSE>
Turl: indeed.
<WarheadsSE>
clear example in the mach-imx6q.c
<wingrime>
buZz: also, jpeg encoding
<buZz>
and mjpeg?
<wingrime>
buZz: mjpeg are same
<buZz>
in encoding yeah .. just needs a wrapper i guess
<WarheadsSE>
Turl: thanks for Rubber Duck
<wingrime>
buZz: hi scale
<wingrime>
buZz: hi quality scale supported and works
<buZz>
hmm if A10/A20 has jpeg encoding and decoding accelerated and exposed in some way, it might become an attractive VJ tool
<wingrime>
buZz: we have our open-source example of jpeg decoding
<wingrime>
buZz: also we have dts and ac3 hw decoders
<buZz>
i dont use audio :) i sometimes play videoloops etc beatmapped to people performing
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<wingrime>
ssvb: possible that cedar can do alpha-blending in (Image Signal Processing engine) and thumbnails generation (non-integer scale)
<ssvb>
wingrime: that would be really cool, is there some sample code or any other information
<steev>
bah, my cb2 rebooted around 6 hours ago, but nothing on serial or such that says why. i'm assuming it locked up, but dunno
<wingrime>
ssvb: only blobs
<wingrime>
ssvb: h264-encode blob have some ISP functions
<wingrime>
ssvb: but it looks not used or simular
<ssvb>
wingrime: if it packs enough functionality to do subtitles/osd without any help from g2d, that's going to be useful for a13
<wingrime>
ssvb: I played with sunII melis images , thats have no any function names in ELFs , (wtf? only static offsets)
<ssvb>
wingrime: that's how one properly builds commercial closed source blobs :) the symbols are usually stripped
<wingrime>
ssvb: even thats ELFs for cedar, there is no any import/export functionality, so calls only using only direct offset (!!) or "SVC calls"
<wingrime>
like x86 irq (dos style)
<WarheadsSE>
Turl: preparing to test, will let you know if this crapola works
<ssvb>
steev: does your cb2 run memory at 480mhz clock speed? there have been some reports that around 20% of a20 chips are unstable with high memory clock speed
<wingrime>
jemk: any regs in engine must be erased after reset
<jemk>
wingrime_: but the cache thing looks interesting, maybe it helps understanding the way cedar reads data. at least the flags in vld_addr regs seem to have effects on the cachereg_wnum values
<wingrime>
jemk: MACC_VE_CACHEREG_WNUM and MACC_VE_MMCREQ_WNUM looks like counteres for it
<wingrime>
jemk: but there is still tons unknown uncovered regs
<wingrime>
jemk: over time thresold I think must do IRQ or simular when cedar do job too long or count how much times cedar was more in wait state than value given
<jemk>
wingrime: ouch, reset hung the cpu when reading afterwards...
<wingrime>
jemk: thats means IRQ happend
<wingrime>
jemk: unhandled
<wingrime>
jemk: have you uart to see kernel log?
<jemk>
wingrime: no, simply stops immediately, no more output on uart
<wingrime>
jemk: can you check witch bit cause it
<wingrime>
jemk: are you playing with uboot?
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<jemk>
wingrime: don't think its irq, why should an irq happen when reading from registers?
<wingrime>
jemk: becose when CPU or HW do critical error they usualy do #reset not hung
<wingrime>
jemk: are you tested it in uboot?
<wingrime>
jemk: I writed/readed all regs in 0-0x100 without any problems with uboot
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<jemk>
wingrime: problem solved, i shouldn't try to read while still in reset xD
<wingrime>
ssvb: nice
<wingrime>
err
<wingrime>
jemk: nice
<jemk>
wingrime: but reset only resets sub engines, the 0x0-0xff block doesn't change
<wingrime>
jemk: as expected
<wingrime>
jemk: full reset bit must be in clock-control-module
<jemk>
wingrime: but bit4 in reset reg doesn't do anything it seems
<wingrime>
jemk: who knows
<jemk>
wingrime: but i noticed, the regs 0x50-0x58 we needed for a13 h264 decoding exist on a10 too
<wingrime>
jemk: some regs not same on sunII
<wingrime>
jemk: only mpeg and vc1 regs
<jemk>
wingrime: you don't have more regs then you added to wiki? because 0x28 seems to be some counter too, but i can't figure out what it counts
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<wingrime>
jemk: no, thats all
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<focus_it>
som1 motherboard i make - it work ok, som2 motherboard dr. ajith design with a little help from me, i make it, and next step is to make that som2 board work
<wingrime_>
focus_it: thats EVER worked?
<wingrime_>
focus_it: no dram
<wingrime_>
focus_it: no hi-speed differential routing....
<focus_it>
that is engineering test board to prove how to build boards properly - dram etc should be able to wire in. I didn't get that far because Dr. Ajith went and made his derivative full thing in 4 months before I got to making dram and everything
<mnemoc>
wtf.... a chinese working at exp gmbh (cb distributor in germany) will send me my CT
* mnemoc
puzzled
<mnemoc>
but makes sense to (ab)use the distributors network for sending prototypes too
<focus_it>
wingrime_: it should work with twisted wires - but I was going to prove that, but as i say dr. ajith was too quick and finish finalized board
<focus_it>
so I help him with that first
<wingrime_>
focus_it: thats imposible dram will work with it
<wingrime_>
mnemoc: yes, same for russia
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<focus_it>
wingrime_: that is current theory - but it doesn't agree with my training - so i wanted to test and prove it
<focus_it>
worst case run it slower and still it should work
<wingrime_>
focus_it: as EE barcelor I can say thats will not work ever
<focus_it>
:)
<wingrime_>
rz2k: PING
<oliv3r>
mnemoc: lol i'm getting a radxa from sweden from some chinese
<wingrime_>
focus_it: thats not teory, thats all about impedance matching , length, and noice
<mnemoc>
oliv3r: my radxa is coming from .se too..... but that's a normal bulk shipping trick .sg/.se post do to save people from paying taxes :p
<wingrime_>
focus_it: 400 Mhz clock means that harmonics will be in 800 and 1200 Mhz
<mnemoc>
oliv3r: but never expected to get the CT prototype from one .de distributor
<wingrime_>
Tsvetan: do you nearly?
<focus_it>
wingrime_: i understand what is being said, if I be wrong, then i am wrong and i have traditional design docs to calculate impedance and length matching and remake board
<wingrime_>
focus_it: indeed, CADs have special tools for it
<wingrime_>
focus_it: more important , all data lines to dram must have SAME electrical length
<focus_it>
wingrime_: dr ajith said he found it was easy to reserve area and add in arcs to get exact lengths as needed less than 50 lines in total out of hundreds that need special manual treatment like this
<oliv3r>
mnemoc: btw, hwo do you know it's comming via .de
<arokux2>
mnemoc: how do you know about CT?
<wingrime_>
focus_it: dram must have _closest_ to SoC
<mnemoc>
oliv3r: because a guy from @exp-tech.de with a german MUA gave me a DHL code that tells so?
<focus_it>
wingrime_: I be surveying CN manufacturing and note they now do 0.1mm traces and clearances as standard - so I'm thinking of redoing board with 2 wires going through ball pads :)
<focus_it>
that will get dram even closer to soc
<oliv3r>
mnemoc: ah you get DHL code
<focus_it>
as well as shrink board by about 1/3rd
<oliv3r>
mnemoc: i haven't seen anything yet
<arokux2>
mnemoc: are you talking about that donated CT?
<mnemoc>
yes
<wingrime_>
focus_it: don't forget all hi-speed interfaced need differenical routing
<wingrime_>
focus_it: there MUCH, MUCH hidden things in HI-speed device rouing for make good device
<arokux2>
mnemoc: mm.. have you got some tracking number from Benn? I wasn't contacted yet by anybody.
<mnemoc>
arokux2: from the german distributor of CBs.....
<wingrime_>
focus_it: for example you need ground layers
<wingrime_>
focus_it: many inter conections for hi-freq currents
<arokux2>
mnemoc: hm.. how did he know to contact you?
<mnemoc>
arokux2: because benn gave him a list probably?
<arokux2>
mnemoc: ok, I'm just curios what is the state of my board, want to test that wifi chip with my usb driver!
<arokux2>
mnemoc: so you've got a DHL tracking number per e-mail?
<wingrime_>
focus_it: also, most important rf strip-lines have noticeble looses with fr4 pcb,
<mnemoc>
arokux2: backport it to 3.10 and I'll test it ;-)
<mnemoc>
arokux2: yes
<oliv3r>
3.10 should be very testable now
<arokux2>
oliv3r: or really? why are you silent then? I've asked you to let me know!
<wingrime_>
focus_it: if that are you doing was in 80-x when cpu worked on 3Mhz, you were correct, but on hi-freq rules changes
<arokux2>
oliv3r: so I can grab it from github?
<focus_it>
wingrime_: i wanted to out all that 'secret sauce' in kicad so that any ee can go build their own tablets and netbooks using GHz arm SoCs
<arokux2>
mnemoc: I wonder if all CTs were sent in batch to germany
<oliv3r>
i'm not done porting all all patches back yet, missing pinctrl
<focus_it>
that be why i got everything out in kicad and open sauced
<mnemoc>
arokux2: benn said he didn't have PCBs to make the 30 he was going to donate yet
<wingrime_>
focus_it: altum have impedance matiching routes
<mnemoc>
arokux2: so your might come in the next batch
<wingrime_>
focus_it: maybe kicad have
<mnemoc>
can't know
<oliv3r>
arokux2: but it should be nearly 'done' now
<arokux2>
oliv3r: make a ML announcement once ready, i need pinctrl, i think
<focus_it>
and document everything on the way so that ee's don't have to suffocate in this new arena
<focus_it>
wingrime_: kicad - no decent router
<focus_it>
all done manually
<arokux2>
mnemoc: last time I contacted Benn he said he sent the boards but didn't get tracking numbers yet...
<wingrime_>
focus_it: there is many books about it
<oliv3r>
arokux2: pinctrl is there and works; and usb doesn't use it
<focus_it>
wingrime_: no problem - it has the calculators for working out impedances - just that it don't autorute well
<focus_it>
that are plans by eu cern and other universities to improve kicad because it serves their causes well
<arokux2>
oliv3r: hm.. I'm referencing pinctrt for my regulators..
<wingrime_>
focus_it: cad only help you, it not helps if you not understand
<arokux2>
oliv3r: anyway, I'll have time in the second half of the week to test :(
<focus_it>
so may be soon even better routing etc going to get inside kicad - but not fussed - the manual routing of 50 wires and get its impedance and length right not too difficult
<oliv3r>
arokux2: yeah buit pinctrl is there and works; there was just a core change that i haven't merged yet
<ssvb>
mnemoc: the shipment from DE is very nice, no need to liberate the board from the customs office this time :)
<focus_it>
after doing one, you just copy paste to make dual computer product or any other project is just copy paste - which is what I really want
<oliv3r>
arokux2: basically the pinctrl is at 3.11.something, and i wanna bring it to 3.12
<arokux2>
oliv3r: ah, ok
<mnemoc>
ssvb: yeah!
<mnemoc>
damn customs
<wingrime_>
focus_it: impedance not enought
<arokux2>
did anybody else got some info on CT?
<arokux2>
get*
<focus_it>
winigrime_: make main cpu a Allwinner A10 or A20, and then drop in peripherals as needed - all from different groups that are open sourcing their designs
<wingrime_>
focus_it: you need hi-freq simulations somethimes to see interferences
<oliv3r>
oh i got mail 30 mintues ago
<oliv3r>
EXP_Tech
<oliv3r>
protoype will be sent out on monday
<mnemoc>
:D
<mnemoc>
so no board liberation for you either
<oliv3r>
yeah so it should arrive this week
<focus_it>
wingrime_: I fully understand
<wingrime_>
focus_it: better read some book about hi-freq routing.
<focus_it>
:)
<oliv3r>
libv: all this glamour talk, isn't that what you mentioned 6? months ago, about all these manufactures re-adding 2D engines because doing everything via 3D isn't efficient enough (e.g. glamour)
<wingrime_>
focus_it: thats example of very very hi freq routing
<mnemoc>
arokux2: 22:43
<arokux2>
I've just checked my e-mail to Benn, I haven't given him my e-main inline, so unless he took my e-mail address I probably won't get an e-mail. hm.. did you supplied an e-mail to him inline?
<oliv3r>
arokux2: we gave him your proper e-mail, don't worry
<wingrime_>
focus_it: looks like magic
<arokux2>
oliv3r: you? :)
<oliv3r>
arokux2: ;)
<oliv3r>
wingrime_: it looks awesome
<oliv3r>
it's giving me a boner
<mnemoc>
there was a list for the first 16 boards, your name and email was there
<mnemoc>
well... "name"
<Turl>
if postman says arokux remember to open :p
<arokux2>
:p
<oliv3r>
k0st0gav
<Turl>
and hope it doesn't get stuck on customs :p
<focus_it>
wingrime_: that looks like microwave circuits - the best I see is fractal antenna
<oliv3r>
sometimes, blind typing can be very annoying
<oliv3r>
when your fingers are off
<arokux2>
mnemoc: there was a list with 15 names, he forgot me and then asked for my address later.
<wingrime_>
focus_it: no, its filters
<focus_it>
wingrime: strange formation them things
<arokux2>
mnemoc: where have you seen that 16-persons list?
<mnemoc>
arokux2: I wrote it
<oliv3r>
arokux2: it was private
<mnemoc>
and then asked him to add a 16th. he confirmed
<mnemoc>
you were that 16th
<focus_it>
wingreme_: is there a book or ref for that type of PCB design?
<arokux2>
there are some very good here: oliv3r: there
<focus_it>
wingrime_: my idea is to use twisted pairs in PCB - costs 2 holes every time wire is twisted 180 degree - it reduce problems with reflection and noise.
<oliv3r>
focus_it: yeah i often though about that, twisting with holes, should be quite nice
<arokux2>
oliv3r: "put it's all there, just header missing" <-- what?
<focus_it>
oliv3r: if twisting works, i document it as tool for building SoC board when using kicad
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<oliv3r>
arokux2: whay?
<arokux2>
oliv3r: ?
<oliv3r>
arokux2: what? what header is missing
<oliv3r>
focus_it: it's untested?
<oliv3r>
focus_it: well you get some noise from each hole i expect
<arokux2>
arete74: I don't understand this: <oliv3r> put it's all there, just header missing
<oliv3r>
when did i say that, some context :)
<oliv3r>
ohh
<oliv3r>
i said it 3 lines before
<oliv3r>
the header, the 4 'pins'
<focus_it>
oliv3r - also add in very small smt capacitors in 1pf steps to control line impedance, reflections and so on. build one board with the dram about 2 inches away, then another one 3 inches away to see what works and doesn't work
<focus_it>
and then most importantly document it for future kicad reference designs
<arokux2>
oliv3r: yeah, the header is missing. actually a few pins will do. now the shipment of these pins will cost me more than pins themselves
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<arokux2>
ssvb: basically I try to follow #linux-rockchip and all the possible comments.. I've seen the comment and pinged Tom. I do not know how the others learned about it. I agree it wasn't transparent.......
<arokux2>
or better to say public
<ssvb>
ok, I was just curious, in fact I don't even have much extra spare time for radxa anyway :)
<arokux2>
ssvb: yeah, yet another cedarx is too much I think, but some random hacking is ok
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<Turl>
hm, tom doing chinese marketing :p
<Turl>
"Ok, when we say 1.8Ghz, it’s kind of marketing"