hno changed the topic of #linux-sunxi to: /Allwinner/sunxi development discussion - Don't ask to ask. Just ask and wait! - See | | Logs at
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<Turl> granite_crusher: it's like 3 lines that you need to add :)
<Turl> granite_crusher: just look at other dts using that same rtc, grep is your friend
<arokux2> Turl: why aren't you submitting PLL6, I could at least push usb clocks
<Turl> arokux2: because I'm lazy, I've been busy and I don't do this for a living :)
<Turl> arokux2: but as you've been pushing quite a bit I'll send them after dinner :)
<arokux2> Turl: thanks :) you've been doing all the possible stuff still :p like 3.10 backporting :p
<arokux2> for the future, I think the clocks must be implemented by the person who writes drivers
<arokux2> Turl: there are some central clocks, but PLL6 should have been left.
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<granite_crusher> I got confused if it is NXP pr philips (the same module pcf8563) and I am not sure if address have to be 0x81 or 0x51(provided in dts'es with "same" rtc)
<granite_crusher> *or
<Turl> arokux2: yeah, I hate schedules :P
<Turl> granite_crusher: I think it's nxp's?
<granite_crusher> Turl: but in kernel it was philips?
<Turl> granite_crusher: the one I saw was nxp I think
<Turl> datasheet is nxp one
<hno> arokux2, sprinkle the code with printks and compare results on 3.4 and mainline?
<granite_crusher> other thing in fex by olimex addres is 81
<arokux2> hno: not sure at which places.. all over ehci-hcd probably. I've written yet another e-mail to the maintainer, maybe he has some clues. so far he hadn't any. :(
<Turl> granite_crusher: drivers/rtc/rtc-pcf8563.c has a nxp compatible
<Turl> arokux2: 81 in base 16 is 51
<Turl> err granite_crusher ^
<Turl> granite_crusher: fex takes them in decimal from what I recall
<granite_crusher> ok :)
<hno> arokux2, also compare sunxi-3.4 to mainline-3.4. AW have hade patches here and there...
<hno> plus sunxi-3.4 is infested with lots of google changes.
<arokux2> hno: I doubt google did something special to ehci stack
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<hno> arokux2, I don't know.. they did mess quite a bit with other usb parts. But I guess most of it is otg related.
<arokux2> thanks hno
<arokux2> good night all.
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<acr> hi
<acr> who know about CedarX engine?
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<Turl> acr: wingrime
<Turl> night
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<acr> wingrime, hi
<acr> u know howto use CedarX with avconv?
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<tgaz> is anyone able to compile the sunxi pwm driver? i get a compilation error for the include file.
<tgaz> -#include <pwm-sunxi.h>
<tgaz> +#include "pwm-sunxi.h"
<Cubear> tgaz: get a newer kernel
<tgaz> second question; patches to the MUSB driver... should that go to lkml or how does it work?
<Cubear> there's a fix in 3.4.61
<tgaz> Cubear, how is linux-sunxi/sunxi-3.4 tracking upstream?
<tgaz> is git pull on that enough?
<Cubear> I did a git clone on the stable 3.4 branch and it compiled fine
<tgaz> yeah, i see the fix. cool
<tgaz> that's actually the only change. ;)
<Cubear> btw if anyone's interested about that cross compiling problems I've been having friday... the ubuntu 3.04 cross compiling toolchain works fine.
<tgaz> have you been able to compare the output binary?
<Cubear> I didn't compare it I just ran it without the ld symlink in /lib and it worked.
<Cubear> I think it could differ significantly because I used a newer compiler. On debian it was gcc 4.4.x, on ubuntu it's gcc v4.7.x
<Cubear> gcc version 4.7.3 (Ubuntu/Linaro 4.7.3-1ubuntu1)
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<tgaz> still sounds more like (linker) settings than gcc. but i'm glad it worked out (and that you are sharing. :)
<Cubear> That toolchain on emdebian how-to page needs to be updated
<Cubear> erm you're right. it's the newer toolchain, not the compiler
<Cubear> seems like I'm still not fully awake yet... just woke up 15 mins ago
<steev> tgaz: you can run ./scripts/ -f path/to/file to see who all should be CC'd
<tgaz> steev, cool script
<steev> but keep in mind, if it's for the 3.4 kernel for in here, and not mainline, it should probably just be these guys
<steev> indeed it is, i have to use it soon myself as I need to fix up a minor bug on a ppc config/setup
<tgaz> steev, it's affecting upstream musb aswell
<tgaz> though, one patch is just fixing the musb_debugfs for sunXi's weird register locations.
<tgaz> i think everyone else is using the *standard* memory mapping for musbmhdrc.
<tgaz> steev, anyway, i could start here as we're the ones most affected. email or pull request. what's preferred?
<steev> tgaz: ask mnemoc
<steev> i'd guess a pull request though
<steev> well actually i think patch to linux-sunxi google group
<tgaz> mnemoc, tiny patch to musb. pull request or google group post?
<steev> arokux1: no i won't be able to get to wifi testing for a couple more days, at the moment the cb2 is busy building some stuff
<tgaz> steev, says mailing list. :)
<steev> indeed, i was actually trying to find that page
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<tgaz> cute. never used git send-email before. of course my VCS has half an email client in it.
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<n01> 'moning
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<djahma> has anyone got an address to share, where I could find help to resolve "Error 2" kernel compilation error? I've been trying to compile a kernel for my tablet for 2 months now. At the moment I'm struggling to go past LD net/built-in.o
<djahma> All the literature I can find on internet is for arm boards, and very rarely for tablets, consequently, touchscreen wifi bluetooth are not working
<djahma> I've managed to get touchscreen working but it is very buggy
<djahma> in short, I'd like to know how to investigate the "make: *** [sub-make] Error 2" error message?
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<n01> djahma: compile with V=1
<djahma> n01: thanks. it seems there are modules.order problems
<djahma> actually, it is just writing the name of the modules to the net/modules.order file. V=1 is not giving me more information about why compilation is failing
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<n01> which kernel are you using.
<djahma> sunxi 3.4
<n01> what CC?
<djahma> CROSS_COMPILE=arm-linux-gnueabihf-
<n01> paste the promlem somewhere so we can take a look
<djahma> using V=2 I could see there was a problem with wl127x-rfkill. Maybe this is the culprit
<n01> are you using the correct defconfig?
<djahma> I used sun4i_defconfig first. The kernel worked but no touchscreen wifi bluetooth etc. So I am compiling again and again with modifications to this config, in order to add more modules, in particular these modules I found after "ls /sys/" in android
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<n01> djahma: disable the wl127x-rfkill module
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<oliv3r> got 2 days of backlog reading
<oliv3r> :S
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<djahma> n01: I disabled it, sorted another problem and the kernel compiled correctly. After playing with modprobe in my tablet, I still couldnt get wlan0 recognised
<djahma> This is strange to see how android invaded the mobile world, and how linux is yet so inadapted to it. They are so closely related though!
<mnemoc> oliv3r: arch/arm/configs/sunxi_defconfig:CONFIG_INITRAMFS_SOURCE="/silo/build/sunxi-bsp/rootfs-buildroot-3.cpio :p
<mnemoc> oliv3r: in exp/3.10
<oliv3r> yeah
<oliv3r> i know :)
<oliv3r> i wanted tof ix it it but didn't have time so i figured i'll do it next push
<oliv3r> :p
<mnemoc> can you upload that cpio to somewhere in ?
<oliv3r> it allready is
<mnemoc> cool
<mnemoc> it would be nice if CONFIG_INITRAMFS_SOURCE supports URLs :p
<oliv3r> lol yeag
<mnemoc> and automatically curl-ing it
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<oliv3r> wget!
<mnemoc> ack
<mnemoc> aaarg... CONFIG_INITRAMFS_SOURCE doesn't path-less when using O= :(
<oliv3r> huh?
<mnemoc> Cannot open 'rootfs-buildroot-3.cpio'
<oliv3r> you mean relative paths
<oliv3r> btw, i'm pushing a new version of everything in 5 mins -force
<mnemoc> ow
<mnemoc> ok
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<mnemoc> evil you
<oliv3r> yeah
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<mnemoc> but to be fair, if stage/ allows -f, experimental/ too
<oliv3r> :p
<oliv3r> well i removed all sun6i stuff
<oliv3r> as it caused issues
<oliv3r> so i just removed it all for now
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<oliv3r> i marked the relevant commiits here:
<mnemoc> maybe stage/sunxi-3.10 and keeping them in exp/ ?
<oliv3r> and! i'm going to order an m5 this week
<oliv3r> it kept failing to merge
<mnemoc> that mele is a31 or a20?
<mnemoc> oh, ok
<oliv3r> a20
<oliv3r> i won't buy a331 stuff
<mnemoc> btw, people reported 113MB/s on A20's SATA!
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<mnemoc> in the G+ group
<oliv3r> cool!
<oliv3r> what driver?
<mnemoc> i assume ours
<oliv3r> ok; cause my mainline one doesn't work yet
<mnemoc> it's on a cb2
<oliv3r> tsvetsan said he's gonna hook some SPI-nor up via the pins to test spi-nor boot
<oliv3r> so we can test*
<mnemoc> oliv3r: little steps work better. 3.4 -> 3.10 -> master
<oliv3r> ahci is just some glue code :p
<mnemoc> easier to narrow regressions and changes
<oliv3r> it's wills wangs patch for our tree
<mnemoc> ok
<oliv3r> well sorta almost
<mnemoc> *g*
<oliv3r> it's a really small patch to be fair :)
<mnemoc> Cannot open './rootfs-buildroot-3.cpio'
<mnemoc> meh. relative-path fails too
<oliv3r> :(
<mnemoc> ok. ../foo.cpio worked
<mnemoc> it just doesn't support O=
<oliv3r> i think search path starts in kernel root
<mnemoc> nope, search path starts in the build root
<mnemoc> not in source root
<oliv3r> 1 final test build before pushing
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<mnemoc> I expected it to use kernel source dir as base, not output dir
<mnemoc> but it sort of makes sense to use output dir considering the .cpio is actually an output
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<mnemoc> each build dir could have a different initramfs with the same name
<oliv3r> i expect so
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<oliv3r> so are you in your new place yet
<oliv3r> btw, we probably will need sunxi-bsp branches
<mnemoc> yes need sunxi-bsp branches for sure
<mnemoc> 3.0, 3.4, 3.10 and mainline
<mnemoc> oliv3r: i have the key of the new place, but need to buy furniture and stuff. and I have this temporal apartment rented until the 7th
<oliv3r> the needs some tweaking
<oliv3r> ah ok
<mnemoc> and sunxi-tools build system and structure needs serious reworking
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<mnemoc> maybe also merging fel with ithamar's work, and kidnapping his packing/unpacking tools
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<mnemoc> LOADADDR thing is 3.10/mainline only.... that alone shows the need of branches
<mnemoc> and fexc needs basic dts output
<mnemoc> at least the muxing
<techn_> mnemoc: some generic oss flashing tool would be even better.. is there any?
<mnemoc> so much to do....
<oliv3r> well LOADADDR is ignored on older stuff :p
<mnemoc> techn_: i suggested pushing a fastboot-compatible uboot over fel
<oliv3r> i should have pulled before pushing ...
<oliv3r> crap
<techn_> mnemoc: something like that
<mnemoc> but fastboot triggers some any-google feelings
<oliv3r> lets hope nobody pushed anything
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<mnemoc> techn_: the main problem is mtd-sunxi vs aw-nand
<techn_> we should be moving towards mtd
<techn_> or is there some problems with it :/
<mnemoc> sure mtd is the right path
<mnemoc> but kills compatibility
<techn_> well.. ofcourse u-boot is missing support
<mnemoc> and kernel needs to detect which nand driver is needed
<mnemoc> as we will be always with one foot on each world
<mnemoc> as with .fex vs. .dts .... but there fexc can make the bridge
<oliv3r> Turl: 07b7eb9 pinctrl: sunxi: drop lock on error path
<oliv3r> Turl: i haven't cherry-picked that one, as that one causes big things to go bad
<oliv3r> Turl: well i think some commits got ommitted on that one
<mnemoc> brb
<oliv3r> Turl: i updated the backporting page to indicate what may be needed.
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<mnemoc> oliv3r: doesn't a bunch of tickets on github fit better?
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<oliv3r> mnemoc: tickets on github? what do you mean?
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<mnemoc> oliv3r: issue tracker
<mnemoc> oliv3r: for each thing that needs to go into sunxi-3.10
<mnemoc> it's not the best issue tracker ever.... but probably better than a wiki page...
<oliv3r> yeah but that's 130 patches
<oliv3r> i don't wanna create 130 issues
<mnemoc> nah, not per-patch, but per subsystem
<mnemoc> or soc
<mnemoc> but let's try to unify things in 3.4 before porting them to 3.10
<mnemoc> then in 3.10 they get style, DTSization and common frameworks love
<mnemoc> but unification and fixes in 3.4 first, so regressions are simpler to discover
<oliv3r> aye
<oliv3r> well first i wanan get a bootable 3.10 thing that can be used AS a baseline :)
<oliv3r> almost done though
<mnemoc> we tag that sunxi-v3.10.12-r1 and publish sunxi-3.10
<mnemoc> as a bootable stablish-mainline compatible tree for brave users
<mnemoc> but sure, it has to boot first :p
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<oliv3r> well almost got all the backporting worked out now i think
<oliv3r> just this pinctrl thing
<Turl> oliv3r: yeah I suspected that patch, it got a merge right behind, probably depends on a pinctrl core change
<oliv3r> Turl: yeah that's what causes the blow up
<oliv3r> Turl: 03b054e that's probably the core patch that's missing?
<Turl> oliv3r: maybe, we should ask mripard :)
<oliv3r> Turl: a git-technical thing
<oliv3r> Turl: when I do git show 6ad30ce
<oliv3r> i get some fixes (from a merge?)
<oliv3r> how would I get that as a patch applied?
<oliv3r> right now i just manually done it, since it was only a few lines
<Turl> git cherry-pick 6ad30ce?
<arokux2> what is this?
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<oliv3r> Turl: it's a merge, so you get 'forgot to pass -m otpion' thing
<oliv3r> arokux2: turls android/CM work
<arokux2> oliv3r: ok..
<Turl> arokux2: oliv3r: that's not mine, that's allwinner's
<Turl> oliv3r: git show 03b054e|patch -p1; git commit -a -c 03b054e ? :P
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<oliv3r> ah! i did > file.patch
<arokux2> Turl: thanks for pushing clocks, wasn't expecting it so soon.
<oliv3r> Turl: if i backport the pinctrl stuff, i can ignore and break the other pinctrl's right? or do we have to pull in all possible changes for those files aswell?
<Turl> arokux2: I told you I'd do so after dinner didn't I? :)
<Turl> oliv3r: ask mnemoc :p
<arokux2> Turl: yes, and you've kept your word
<oliv3r> Turl: i'll do a partial cherry-pick for now, only using the pinctrl core + sunxi stuff
<mnemoc> been sunxi-3.10, I think we should backport as little as possible to get a working sunxi-dts which can be used in 3.10 infrastructure as "equivalent" to master's as possible
<mnemoc> but not backport non-3.10 infrastructure/frameworks
<oliv3r> mnemoc: the thing is, there where some pinctrl core changes, i've backported the core bits + sunxi bits; but the 'others' fail to apply
<oliv3r> so i just stripped those out, as they are of no interest to us
<mnemoc> ack
<mnemoc> it's a sunxi tree anyway, f* the rest of the arm world :p
<oliv3r> and it's just noise to 'fix' rockchip pinctrl stuff :)
<oliv3r> :)
<oliv3r> bah fails to build :)
<mnemoc> rockchip fixes aren't relevant to us
<oliv3r> exactly
<oliv3r> anyway, bbl
<oliv3r> gotta reboot server
<oliv3r> got a ton of stale nfs bits, upgraded kernels etc
<oliv3r> was posponing it for weeks :)
<mnemoc> *g*
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<oliv3r> so bbl :)
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<Turl> I should reboot mine too, I upgraded the kernel the other day
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<WarheadsSE> So, since I know you guys are fooling with & without DTS @ the board files, maybe someone can shed some light for me.
<WarheadsSE> I am working on a non-sunxi board, but the damned -setup.c is driving me nuts.
<WarheadsSE> This POS has flags that need to be passed to the eth PHY before reset, and the driver appears to be able to do this if you provide phydev-> with a 4xu16 array
<WarheadsSE> Now, the damned thing is not yet DTS capable (uboot and bullshit), but I need to get this PHY to it.
<WarheadsSE> I have 2 choices, 1) manage a way to get it to DTS or zImage+dtb, 2) correctly hand-make the mentioned data piece in the -setup.c
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<WarheadsSE> I am at the point where I have what appears (logically) to me a correct and hand made phydev-> pile made in the -setup.c, but I am getting complaints about initializer element is not constant in setting up the device.of_node value.
<WarheadsSE> So, either I am missing something, and/or my understanding ot the object setup is missing
<WarheadsSE> Anyone that can offer input, that would be mice.
<WarheadsSE> s/mi/ni/
<Turl> WarheadsSE: I don't think you can magically make a hand made of node and stuff it there
<Turl> WarheadsSE: can't you just edit the net driver to do fixup on the non-OF case for your board?
<Turl> WarheadsSE: board files seem to use phy_register_fixup_for_uid() to get their phy fixup done
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<WarheadsSE> I suppose I can.. won't be fun because it is the mv643xx
<WarheadsSE> I dug around and intot he drivers/net/phy/marvell.c
<WarheadsSE> That .. grabs link
<WarheadsSE> and in the drivers/net/ethernet/marvell/mv643xx.c ... let me find the line
<Turl> do you need to upstream it or is it just for internal use?
<WarheadsSE> in the eth_probe it has a schlep between phy_node (phy_device & phy_addr breing present.
<WarheadsSE> I refuse to bastardize the piss out of this
<WarheadsSE> If I have to edit upstream code, I will upstream it, and I will not be that shithead.
<WarheadsSE> line 2887 btw
<Turl> yeah, looks like support for OF and platform data on the other case
<WarheadsSE> Yeah, I am attempting to find what you references.
<WarheadsSE> The problem of course being that the phy/marvell.c completely gives no shit about it.
<wingrime> Turl: thats very fun
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<wingrime> Turl: h264 encode blobs
<wingrime> Turl: have no stable API (((
<Turl> wingrime: hm?
<WarheadsSE> I see the fixups now, I am looking to see if it is applicable to pre-reset init.
<WarheadsSE> Turl: I am having trouble finding good explaination of these fixups, but I am looking for references now
<wingrime> Turl: control codes diffenet in each libh264 blob (I found 3 of it)
<Turl> WarheadsSE: maybe drivers/net/phy/phy_device.c:
<WarheadsSE> Turl: looks like the imx6q variants have some
<wingrime> Turl: good news, ISP is Image Signal Processor , can do tumbnails
<buZz> accelerated thumbnailing? :P sweet
<buZz> also for video?
<wingrime> buZz: h264 hw encoding
<WarheadsSE> Turl: indeed.
<WarheadsSE> clear example in the mach-imx6q.c
<wingrime> buZz: also, jpeg encoding
<buZz> and mjpeg?
<wingrime> buZz: mjpeg are same
<buZz> in encoding yeah .. just needs a wrapper i guess
<WarheadsSE> Turl: thanks for Rubber Duck
<wingrime> buZz: hi scale
<wingrime> buZz: hi quality scale supported and works
<buZz> hmm if A10/A20 has jpeg encoding and decoding accelerated and exposed in some way, it might become an attractive VJ tool
<wingrime> buZz: we have our open-source example of jpeg decoding
<wingrime> buZz: also we have dts and ac3 hw decoders
<buZz> i dont use audio :) i sometimes play videoloops etc beatmapped to people performing
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<wingrime> ssvb: possible that cedar can do alpha-blending in (Image Signal Processing engine) and thumbnails generation (non-integer scale)
<ssvb> wingrime: that would be really cool, is there some sample code or any other information
<steev> bah, my cb2 rebooted around 6 hours ago, but nothing on serial or such that says why. i'm assuming it locked up, but dunno
<wingrime> ssvb: only blobs
<wingrime> ssvb: h264-encode blob have some ISP functions
<wingrime> ssvb: but it looks not used or simular
<ssvb> wingrime: if it packs enough functionality to do subtitles/osd without any help from g2d, that's going to be useful for a13
<wingrime> ssvb: I played with sunII melis images , thats have no any function names in ELFs , (wtf? only static offsets)
<ssvb> wingrime: that's how one properly builds commercial closed source blobs :) the symbols are usually stripped
<wingrime> ssvb: even thats ELFs for cedar, there is no any import/export functionality, so calls only using only direct offset (!!) or "SVC calls"
<wingrime> like x86 irq (dos style)
<WarheadsSE> Turl: preparing to test, will let you know if this crapola works
<ssvb> steev: does your cb2 run memory at 480mhz clock speed? there have been some reports that around 20% of a20 chips are unstable with high memory clock speed
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<wingrime> ssvb: mplayer OSD with cedar only will be nice
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<mnemoc> wingrime: hi, will you send the v2 of your hdmi cleanup patchset?
<wingrime> mnemoc: will, but now I working on cedar ISP RE
<mnemoc> ok
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<mnemoc> so i'll unstar that thread. thanks.
<wingrime> mnemoc: I only add 2 patches
<wingrime> *will add
<wingrime> mnemoc: you finaly being work with old mails?
<mnemoc> trying
<wingrime> cool
<steev> ssvb: looks like it
<steev> ssvb: though to be fair i was running an emerge -e @system and an emerge mutt at the same time
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<oliv3r> there
<oliv3r> i have returneth
<oliv3r> what did I miss, i'll backread later tonight
<wingrime> oliv3r: preset for you
<oliv3r> what's that?
<oliv3r> looks like memory stick header file
<oliv3r> sony Memory stick and Memory stick pro
<oliv3r> with register info
<wingrime> oliv3r: from sunII
<oliv3r> oh, that's kinda cool
<oliv3r> since we have 0 documents about MS
<wingrime> oliv3r: you can add to wiki now
<oliv3r> we could be able to write docs from that and see if it works for sun4i
<oliv3r> yeah i'll copy paste it for now :p no time on weekends usually :)
<oliv3r> would be kinda neat, if we could get sun1i sun2i and sun3i dev boards to make sunxi work with them aswel ;)
<oliv3r> but they are probably too old and too slow
<buZz> the F20 chip etc?
<buZz> i saw it used in a digital camcorder :P
<wingrime> buZz: F10/F15
<buZz> ah ok
<wingrime> buZz: mp3 player
<wingrime> and video
<buZz> i often just search on 'allwinner' to find weird products using their chips
<oliv3r> F20 is sun3i iircv
<oliv3r> wingrime: that looks liek the entire memory map of sun2i?
<wingrime> oliv3r: yes
<wingrime> oliv3r: thats help see that was
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<mnemoc> sun[23]i aren't dead... we just don't have hardware with uart and people interested in supporting them
<mnemoc> tom said once that there were tons of devkits for those abandoned in aw's labs... and he promised to get us a few... then he quitted aw :(
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<oliv3r> yeah but aren't those socs really weak
<oliv3r> and actual hardware hard to find
<oliv3r> so 'why bother' I say :)
<oliv3r> while i'd be awesome to have support
<wingrime> oliv3r: wow, new cedar regs for mpeg/vc1
<mnemoc> oliv3r: armv6 just like r-pi...
<wingrime> ssvb: , cedar have performance counters
<wingrime> ssvb: I found new regs in sunII header
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<rm> <mnemoc> sun[23]i aren't dead <- not being produced (?), not being shipped in million quantities in modern tablets
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<rm> pretty dead
<wingrime> rm: second live in cam-codes gps navi e-book readers
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<wingrime> oliv3r: ping
<wingrime> jemk: ping
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<jemk> wingrime: pong, but not much time
<wingrime> jemk: check new regs
<jemk> wingrime: cool, i'll try if i can check some of them
<oliv3r> wingrime: pong
<wingrime> oliv3r: I add old regs to SRAM page
<oliv3r> wingrime: new cedar regs in wun3i?
<oliv3r> wingrime: okay
<oliv3r> mnemoc: oh sun3i is armv6? heh
<wingrime> oliv3r: can you somehow confurm?
<wingrime> jemk: so, there perfomance counters, and some regs I not understand
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<Turl> mripard: ping? :)
<mripard> yep ?
<Turl> mripard: async timers 0 and 1, maybe 4 and 5 too :)
<Turl> mripard: page 90 @ A13 manual
<mripard> hmmm right
<oliv3r> wingrime: you mean a20 sram registers?
<WarheadsSE> Turl: well, at least that seems to have compiled okay
<WarheadsSE> Can;t tell if it is/isnt working yet until I figure out how to properly tirgger the WOL code for the PHY
<Turl> wake on lan? :o
<wingrime> oliv3r: I add thats was defined in sunII headrs
<oliv3r> Turl: i was awol; did you find anything else interesting with regards to pinctrl?
<oliv3r> wingrime: ohh, ok so we def. have to tripple check if it works in sun[457]i
<Turl> oliv3r: I haven't been looking
<oliv3r> kk i'll see where the build goes wrong first
<Turl> oliv3r: we can ask mripard now that he is around though :)
<wingrime> oliv3r: I sure they not changed so much
<mripard> Turl: I don't think there's support for the "reparenting" of a clocksource though
<WarheadsSE> yup
<mripard> to change its own rate
<mripard> that would be useful as well when doing some power management.
<Turl> mripard: maybe it's something the framework needs to implement
<Turl> otherwise we'll need to move back to the old timers when running cpufreq or time may get all weird :)
<mripard> yeah, but the timers can run at 32kHz
<mripard> which is something you probably want as well if you are interested in using cpufreq
<mripard> Turl: btw, Allwinner HS Timers != Linux hrtimers
<Turl> mripard: high speed != high resolution?
<mripard> in an absolute world, yes
<WarheadsSE> Turl: yes, this thing has an MCU tied to the WOL & LED[2]
<mripard> the High Speed here compares to the lower speed timers found in the Allwinner stuff
<WarheadsSE> I have these idiots
<Turl> mripard: hm?
<mripard> while the High Resolution compares to the timers support in Linux quite a while ago where the timer resolution was of 1 jiffy
<wingrime_> WHO know chinese HERE ????
<Turl> wingrime_: hipboi
<Turl> wingrime_: google translate too, it is ok nowadays
<wingrime_> Turl: no, need download something from baidu with registration
<wingrime_> Turl: f15 man
<Turl> wingrime_: tried usernames?
<wingrime_> no
<mripard> Turl: put another way, you could disable the hrtimers support, and Linux would still use the HS timers
<wingrime_> Turl: thanks but speed is hell
<wingrime_> jemk: are you tested timers?
<wingrime_> jemk: err, counteres
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<Turl> mripard: so hrtimers is like an API to use clocksources
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<jemk> wingrime_: yes, see wiki, counter works, but isn't of much use
<wingrime_> jemk: it count read/write ?
<wingrime_> jemk: but witch reads?
<wingrime_> jemk: to RAM or DMAs
<jemk> wingrime_: ah, haven't found out about these, only cycle counter
<mripard> Turl: not exactly, but you're getting closer
<mripard> Turl: the kernel uses the clock events to program timers
<mripard> pre-hrtimers, at every system tick, it evaluated the timers that needed to be fired, and did it if relevant
<wingrime_> jemk: OverTimeThresold ? it do IRQ or cedar can do hard-frame-drop?
<mripard> so you had a resolution of 1 jiffy for all the timers in the system
<mripard> be it kernel or userspace
<mripard> hrtimer sides track that if you want, and just use the clockevents directly to be able to program more accurate timers
<Turl> mripard: so hrtimers is a leaner framework to dispatch timers
<Turl> using clocksources
<mripard> clockevents
<mripard> not clocksources :)
<wingrime_> jemk: something ve_ctrl I think can enable that r/w conters, we have many unchecked bits there
<mripard> clocksources are just a way for the kernel to keep track of time
<wingrime_> jemk: also, only 2 writable bits in VE_RESET
<mripard> but yes, pretty much
<mripard> and now, I'm going to bed
<Turl> mripard: kernel devs have a gift for naming stuff
<Turl> mripard: if you get bored tomorrow, I'll take acks on my patches :)
<mripard> that's planned :)
<wingrime> jemk: nice
<jemk> wingrime_: r/w counters: see wiki. overtimeth i have no idea yet. maybe its something like you thought, but i don't see how it would be used
<wingrime> jemk: reset can be easy tested
<wingrime> jemk: any regs in engine must be erased after reset
<jemk> wingrime_: but the cache thing looks interesting, maybe it helps understanding the way cedar reads data. at least the flags in vld_addr regs seem to have effects on the cachereg_wnum values
<wingrime> jemk: MACC_VE_CACHEREG_WNUM and MACC_VE_MMCREQ_WNUM looks like counteres for it
<wingrime> jemk: but there is still tons unknown uncovered regs
<wingrime> jemk: over time thresold I think must do IRQ or simular when cedar do job too long or count how much times cedar was more in wait state than value given
<jemk> wingrime: ouch, reset hung the cpu when reading afterwards...
<wingrime> jemk: thats means IRQ happend
<wingrime> jemk: unhandled
<wingrime> jemk: have you uart to see kernel log?
<jemk> wingrime: no, simply stops immediately, no more output on uart
<wingrime> jemk: can you check witch bit cause it
<wingrime> jemk: are you playing with uboot?
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<jemk> wingrime: don't think its irq, why should an irq happen when reading from registers?
<wingrime> jemk: becose when CPU or HW do critical error they usualy do #reset not hung
<wingrime> jemk: are you tested it in uboot?
<wingrime> jemk: I writed/readed all regs in 0-0x100 without any problems with uboot
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<jemk> wingrime: problem solved, i shouldn't try to read while still in reset xD
<wingrime> ssvb: nice
<wingrime> err
<wingrime> jemk: nice
<jemk> wingrime: but reset only resets sub engines, the 0x0-0xff block doesn't change
<wingrime> jemk: as expected
<wingrime> jemk: full reset bit must be in clock-control-module
<jemk> wingrime: but bit4 in reset reg doesn't do anything it seems
<wingrime> jemk: who knows
<jemk> wingrime: but i noticed, the regs 0x50-0x58 we needed for a13 h264 decoding exist on a10 too
<wingrime> jemk: some regs not same on sunII
<wingrime> jemk: only mpeg and vc1 regs
<jemk> wingrime: you don't have more regs then you added to wiki? because 0x28 seems to be some counter too, but i can't figure out what it counts
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<wingrime> jemk: no, thats all
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<jemk> wingrime: ok, i'll see if i can play a little more with the new regs next week, but i have to stop now
<jemk> wingrime: days are too short to do all this stuff
<wingrime> jemk: ok, but new one news, we have mpeg encoder seems
<wingrime> #define MACC_MODULE_MPEG_ENC 8
<jemk> wingrime: well, mpeg decoder can do jpeg, so jpeg encoder might do mpeg encoding too
<wingrime> jemk: no, thats different module looks
<wingrime> jemk: ISP for jpeg
<wingrime> as alpha blending and resize
<wingrime> but blob use ISP for jpeg encode
<wingrime> jemk: but what we have also????
<wingrime> ssvb: I find little notice, we seems have MPEG encoder onboard
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<wingrime> who sayed thay dead?
<rz2k> all current bs grade players from explay, texet and whatever is sold around are boxchip OEMs
<rz2k> with RTOSes inside
<rz2k> players=mediaplayers
<wingrime_> rz2k: indeed
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<oliv3r> minimum order 10.000
<oliv3r> lol
<oliv3r> if i could buy one for 25E i'd get one for just the hell of it
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<mnemoc> oliv3r: poke benn, he can probably get you a sun3i devkit if you want to
<wingrime_> mnemoc: I find some interested regs form some sun2i dsk
<wingrime_> *sdk
<wingrime_> mnemoc: for SRAM and cedarx
<wingrime_> mnemoc: also, I sended email to benn yesterday (gmail) but still no answer
<wingrime_> mnemoc: and important according sun2i sdk we have ... MPEG encoder
<oliv3r> mnemoc: yeah but that also means lots of time to burn, on then something I won't use; i rather get sun457i up and running :)
<oliv3r> wingrime_: it's weekend, he might not answer till monday
<oliv3r> wingrime_: does that IP you found yesterday mention MPEG Encoder?
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<wingrime_> oliv3r: it can encode H264, MVC and VP8
<wingrime_> and jpeg
<oliv3r> let me find the synopsis IP page again
<oliv3r> but if you can encode jpeg; mpeg is SO close
<oliv3r> ah yeah, designware IP doesn't list mpeg
<oliv3r> but sun2i appearnatly did?
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<wingrime_> oliv3r: #define MACC_MODULE_MPEG_ENC 8
<wingrime_> oliv3r: all others sub-engine selector id in sunii header was known
<focus_it> got Ubuntu 13.04 desktop linux working on EOMA and Cubieboard2
<focus_it> :)
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<wingrime_> focus_it: are you maked that pcb
<wingrime_> ?
<wingrime_> focus_it: thats looks like hell
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<focus_it> wingrime_: which pcb? SoM2?
<oliv3r> wingrime_: the more we find to know,t he cooler D:
<wingrime_> som1
<wingrime_> I wonder if it realy worked
<focus_it> som1 motherboard i make - it work ok, som2 motherboard dr. ajith design with a little help from me, i make it, and next step is to make that som2 board work
<wingrime_> focus_it: thats EVER worked?
<wingrime_> focus_it: no dram
<wingrime_> focus_it: no hi-speed differential routing....
<focus_it> that is engineering test board to prove how to build boards properly - dram etc should be able to wire in. I didn't get that far because Dr. Ajith went and made his derivative full thing in 4 months before I got to making dram and everything
<mnemoc> wtf.... a chinese working at exp gmbh (cb distributor in germany) will send me my CT
* mnemoc puzzled
<mnemoc> but makes sense to (ab)use the distributors network for sending prototypes too
<focus_it> wingrime_: it should work with twisted wires - but I was going to prove that, but as i say dr. ajith was too quick and finish finalized board
<focus_it> so I help him with that first
<wingrime_> focus_it: thats imposible dram will work with it
<wingrime_> mnemoc: yes, same for russia
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<focus_it> wingrime_: that is current theory - but it doesn't agree with my training - so i wanted to test and prove it
<focus_it> worst case run it slower and still it should work
<wingrime_> focus_it: as EE barcelor I can say thats will not work ever
<focus_it> :)
<wingrime_> rz2k: PING
<oliv3r> mnemoc: lol i'm getting a radxa from sweden from some chinese
<wingrime_> focus_it: thats not teory, thats all about impedance matching , length, and noice
<mnemoc> oliv3r: my radxa is coming from .se too..... but that's a normal bulk shipping trick .sg/.se post do to save people from paying taxes :p
<wingrime_> focus_it: 400 Mhz clock means that harmonics will be in 800 and 1200 Mhz
<mnemoc> oliv3r: but never expected to get the CT prototype from one .de distributor
<wingrime_> Tsvetan: do you nearly?
<focus_it> wingrime_: i understand what is being said, if I be wrong, then i am wrong and i have traditional design docs to calculate impedance and length matching and remake board
<wingrime_> focus_it: indeed, CADs have special tools for it
<wingrime_> focus_it: more important , all data lines to dram must have SAME electrical length
<focus_it> wingrime_: dr ajith said he found it was easy to reserve area and add in arcs to get exact lengths as needed less than 50 lines in total out of hundreds that need special manual treatment like this
<oliv3r> mnemoc: btw, hwo do you know it's comming via .de
<arokux2> mnemoc: how do you know about CT?
<wingrime_> focus_it: dram must have _closest_ to SoC
<mnemoc> oliv3r: because a guy from with a german MUA gave me a DHL code that tells so?
<focus_it> wingrime_: I be surveying CN manufacturing and note they now do 0.1mm traces and clearances as standard - so I'm thinking of redoing board with 2 wires going through ball pads :)
<focus_it> that will get dram even closer to soc
<oliv3r> mnemoc: ah you get DHL code
<focus_it> as well as shrink board by about 1/3rd
<oliv3r> mnemoc: i haven't seen anything yet
<arokux2> mnemoc: are you talking about that donated CT?
<mnemoc> yes
<wingrime_> focus_it: don't forget all hi-speed interfaced need differenical routing
<wingrime_> focus_it: there MUCH, MUCH hidden things in HI-speed device rouing for make good device
<arokux2> mnemoc: mm.. have you got some tracking number from Benn? I wasn't contacted yet by anybody.
<mnemoc> arokux2: from the german distributor of CBs.....
<wingrime_> focus_it: for example you need ground layers
<wingrime_> focus_it: many inter conections for hi-freq currents
<arokux2> mnemoc: hm.. how did he know to contact you?
<mnemoc> arokux2: because benn gave him a list probably?
<arokux2> mnemoc: ok, I'm just curios what is the state of my board, want to test that wifi chip with my usb driver!
<arokux2> mnemoc: so you've got a DHL tracking number per e-mail?
<wingrime_> focus_it: also, most important rf strip-lines have noticeble looses with fr4 pcb,
<mnemoc> arokux2: backport it to 3.10 and I'll test it ;-)
<mnemoc> arokux2: yes
<oliv3r> 3.10 should be very testable now
<arokux2> oliv3r: or really? why are you silent then? I've asked you to let me know!
<wingrime_> focus_it: if that are you doing was in 80-x when cpu worked on 3Mhz, you were correct, but on hi-freq rules changes
<arokux2> oliv3r: so I can grab it from github?
<focus_it> wingrime_: i wanted to out all that 'secret sauce' in kicad so that any ee can go build their own tablets and netbooks using GHz arm SoCs
<arokux2> mnemoc: I wonder if all CTs were sent in batch to germany
<oliv3r> i'm not done porting all all patches back yet, missing pinctrl
<focus_it> that be why i got everything out in kicad and open sauced
<mnemoc> arokux2: benn said he didn't have PCBs to make the 30 he was going to donate yet
<wingrime_> focus_it: altum have impedance matiching routes
<mnemoc> arokux2: so your might come in the next batch
<wingrime_> focus_it: maybe kicad have
<mnemoc> can't know
<oliv3r> arokux2: but it should be nearly 'done' now
<arokux2> oliv3r: make a ML announcement once ready, i need pinctrl, i think
<focus_it> and document everything on the way so that ee's don't have to suffocate in this new arena
<focus_it> wingrime_: kicad - no decent router
<focus_it> all done manually
<arokux2> mnemoc: last time I contacted Benn he said he sent the boards but didn't get tracking numbers yet...
<wingrime_> focus_it: there is many books about it
<oliv3r> arokux2: pinctrl is there and works; and usb doesn't use it
<focus_it> wingrime_: no problem - it has the calculators for working out impedances - just that it don't autorute well
<focus_it> that are plans by eu cern and other universities to improve kicad because it serves their causes well
<arokux2> oliv3r: hm.. I'm referencing pinctrt for my regulators..
<wingrime_> focus_it: cad only help you, it not helps if you not understand
<arokux2> oliv3r: anyway, I'll have time in the second half of the week to test :(
<focus_it> so may be soon even better routing etc going to get inside kicad - but not fussed - the manual routing of 50 wires and get its impedance and length right not too difficult
<oliv3r> arokux2: yeah buit pinctrl is there and works; there was just a core change that i haven't merged yet
<ssvb> mnemoc: the shipment from DE is very nice, no need to liberate the board from the customs office this time :)
<focus_it> after doing one, you just copy paste to make dual computer product or any other project is just copy paste - which is what I really want
<oliv3r> arokux2: basically the pinctrl is at 3.11.something, and i wanna bring it to 3.12
<arokux2> oliv3r: ah, ok
<mnemoc> ssvb: yeah!
<mnemoc> damn customs
<wingrime_> focus_it: impedance not enought
<arokux2> did anybody else got some info on CT?
<arokux2> get*
<focus_it> winigrime_: make main cpu a Allwinner A10 or A20, and then drop in peripherals as needed - all from different groups that are open sourcing their designs
<wingrime_> focus_it: you need hi-freq simulations somethimes to see interferences
<oliv3r> oh i got mail 30 mintues ago
<oliv3r> EXP_Tech
<oliv3r> protoype will be sent out on monday
<mnemoc> :D
<mnemoc> so no board liberation for you either
<oliv3r> yeah so it should arrive this week
<focus_it> wingrime_: I fully understand
<wingrime_> focus_it: better read some book about hi-freq routing.
<focus_it> :)
<oliv3r> libv: all this glamour talk, isn't that what you mentioned 6? months ago, about all these manufactures re-adding 2D engines because doing everything via 3D isn't efficient enough (e.g. glamour)
<arokux2> mnemoc: when did you got your e-mail?
<oliv3r> 22:45 exactly for me
<wingrime_> focus_it: thats example of very very hi freq routing
<mnemoc> arokux2: 22:43
<arokux2> I've just checked my e-mail to Benn, I haven't given him my e-main inline, so unless he took my e-mail address I probably won't get an e-mail. hm.. did you supplied an e-mail to him inline?
<oliv3r> arokux2: we gave him your proper e-mail, don't worry
<wingrime_> focus_it: looks like magic
<arokux2> oliv3r: you? :)
<oliv3r> arokux2: ;)
<oliv3r> wingrime_: it looks awesome
<oliv3r> it's giving me a boner
<mnemoc> there was a list for the first 16 boards, your name and email was there
<mnemoc> well... "name"
<Turl> if postman says arokux remember to open :p
<arokux2> :p
<oliv3r> k0st0gav
<Turl> and hope it doesn't get stuck on customs :p
<focus_it> wingrime_: that looks like microwave circuits - the best I see is fractal antenna
<oliv3r> sometimes, blind typing can be very annoying
<oliv3r> when your fingers are off
<arokux2> mnemoc: there was a list with 15 names, he forgot me and then asked for my address later.
<wingrime_> focus_it: no, its filters
<focus_it> wingrime: strange formation them things
<arokux2> mnemoc: where have you seen that 16-persons list?
<mnemoc> arokux2: I wrote it
<oliv3r> arokux2: it was private
<mnemoc> and then asked him to add a 16th. he confirmed
<mnemoc> you were that 16th
<focus_it> wingreme_: is there a book or ref for that type of PCB design?
<wingrime_> focus_it: band filter
<arokux2> mnemoc: ah.. you are our Éminence grise then :p
<focus_it> wingrime_: that kind of stuff is hard work - i normally stick to digital electronics
<mnemoc> arokux2: nah, just the secretary
<arokux2> mnemoc: but then I do not understand why you've said mine will come in the second batch..
<wingrime_> focus_it: digital will behaves same when it will faster
<mnemoc> arokux2: I don't know. benn said he had very few PCBs so the 30+ donations will go in two batches
<arokux2> mnemoc: I see thanks. I'll be patient.
<mnemoc> :)
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<arokux2> I've got radxa board, but guess what? on mine they've forgotten to solder pins for UART
<oliv3r> youve got it allready?
<oliv3r> that's fast
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<arokux2> take a look at these nice holes :)
<oliv3r> take some ogod pics for wiki :)
<arokux2> just behind IR
<arokux2> there are some very good here: oliv3r: there
<focus_it> wingrime_: my idea is to use twisted pairs in PCB - costs 2 holes every time wire is twisted 180 degree - it reduce problems with reflection and noise.
<oliv3r> arokux2: oh yeah not our wiki forgot
<oliv3r> put it's all there, just header missing
<oliv3r> focus_it: yeah i often though about that, twisting with holes, should be quite nice
<arokux2> oliv3r: "put it's all there, just header missing" <-- what?
<focus_it> oliv3r: if twisting works, i document it as tool for building SoC board when using kicad
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<oliv3r> arokux2: whay?
<arokux2> oliv3r: ?
<oliv3r> arokux2: what? what header is missing
<oliv3r> focus_it: it's untested?
<oliv3r> focus_it: well you get some noise from each hole i expect
<arokux2> arete74: I don't understand this: <oliv3r> put it's all there, just header missing
<oliv3r> when did i say that, some context :)
<oliv3r> ohh
<oliv3r> i said it 3 lines before
<oliv3r> the header, the 4 'pins'
<focus_it> oliv3r - also add in very small smt capacitors in 1pf steps to control line impedance, reflections and so on. build one board with the dram about 2 inches away, then another one 3 inches away to see what works and doesn't work
<focus_it> and then most importantly document it for future kicad reference designs
<arokux2> oliv3r: yeah, the header is missing. actually a few pins will do. now the shipment of these pins will cost me more than pins themselves
<oliv3r> ok on this design, why is the middle U a little more appart
<oliv3r> arokux2: get some random pin :p
<oliv3r> arokux2: i have this stuff stocked usually :)
<oliv3r> ebay is very good for pins like that
<oliv3r> free shipping often
<arokux2> oliv3r: another 2 weeks to wait for some shipping from china..
<oliv3r> that's why i have that shit stocked :)
<arokux2> oliv3r: I wasn't messing up with hardware at all, I might buy some kit I think
<oliv3r> anyway, you can use any wire that fits in your usb -> uart :)
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<wingrime_> oliv3r: middle u form other peak
<oliv3r> wingrime_: ahh so those peaks relate
<oliv3r> ok makes sense
<oliv3r> those PCB's assume however all signals etc procrate trhough '2D'
<wingrime_> oliv3r: 3rd order filter
<oliv3r> but isn't it all going into the 3rd dimension too?
<mnemoc> arokux2: uhm.... hope my radxa rock comes with pins.... I can't solder :(
<oliv3r> or are you shielding it top/bottom to avoid that
<oliv3r> mnemoc: it very likly doesn't
<mnemoc> but rockchip is offtopic here!
<oliv3r> mnemoc: and what are you gonna do with your rock ;)
<mnemoc> oliv3r: :'(
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<oliv3r> mnemoc: anyway, you know how I did my first soldering, before I ever got an iron, at 14 < years?
<mnemoc> oliv3r: don't know ye :p
<oliv3r> mnemoc: i took a 2 pin cooking 'fork' from my mother (those with 5cm long teeth), heated it over the gas furnace
<arokux2> radxa is actually very sexy board. only SATA is missing I think
<oliv3r> and as it was hot, melted tin
<oliv3r> :)
<arokux2> quad core + wifi + mic + 2Gb..
<oliv3r> closed bootloader
<oliv3r> :p
<mnemoc> oliv3r: i'm not that brave
<arokux2> oliv3r: closed.. something is encrypted even!
<mnemoc> oliv3r: i'm really scared to damage the boards
<arokux2> mnemoc: yeah, me too.
<oliv3r> i solderd a game controller for a C64 together :)
<oliv3r> i took the cable from the broken controller, and solderd into the case of the remote controll of a RC (wired) car
<oliv3r> my first hack! and I never documented it :(
<arokux2> btw, radxa is shipped with case
<arokux2> like this one, but not from transparent plastic
<arokux2> I wonder how Tom and his friends be so fast, there are lots of companies out there, but they've managed to be first
<oliv3r> so its like cb1
<oliv3r> well i won't be putting much time into rockchip for now; not until they open the bootlaoder for 1
<oliv3r> and secondly not until a10/a20 support is better ;)
<oliv3r> looks like they did add the RTC battery that was ommited from cb1/2
<oliv3r> luckly cubietruck does have RTC batt
<oliv3r> was my suggestion actually /gloat ;)
<arokux2> oliv3r: doing two things in parallel could be easy. for example I can now easily add usb support for RK
<arokux2> oliv3r: you could add SATA
<arokux2> oliv3r: oh shit, no SATA there! :)
<oliv3r> arokux2: that's assuming that the glue code is identical
<arokux2> oliv3r: no, not identical, but similar
<arokux2> oliv3r: you learn how the kernel works and you know what to look for..
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<ssvb> just wonder, how did you all get the radxa board prototypes? was there some sort of early announcement from hipboi that I missed?
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<arokux2> ssvb: take a look at comments
<ssvb> arokux1: thx
<arokux2> ssvb: I'm arokux2 now! :)
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<arokux2> ssvb: basically I try to follow #linux-rockchip and all the possible comments.. I've seen the comment and pinged Tom. I do not know how the others learned about it. I agree it wasn't transparent.......
<arokux2> or better to say public
<ssvb> ok, I was just curious, in fact I don't even have much extra spare time for radxa anyway :)
<arokux2> ssvb: yeah, yet another cedarx is too much I think, but some random hacking is ok
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<Turl> hm, tom doing chinese marketing :p
<Turl> "Ok, when we say 1.8Ghz, it’s kind of marketing"
<ssvb> it's not kind, it's evil
<ssvb> :)
<nedko> :)
<arokux2> Turl: will you also get radxa?
<Turl> arokux2: nope
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