<apritzel>
MoeIcenowy: no, hadn't have any time yet
<apritzel>
MoeIcenowy: but will look at it tonight
<willmore>
I don't think anyone uses win 10 IoT on anything.
<MoeIcenowy>
thx
<apritzel>
MoeIcenowy: I have adapted the delays as well
<MoeIcenowy>
which?
<willmore>
I think everyone who ever touches it looks at it, laughs hysterically, and then goes back to designing with more appropriate hardware and software.
<MoeIcenowy>
the stock set?
<apritzel>
as jemk said, LPDDR3 seems to be more sensitive there
<apritzel>
MoeIcenowy: I added another set, by looking at the boot0 hexdump
<apritzel>
MoeIcenowy: and added a Kconfig option to select one
<MoeIcenowy>
can you compare your hexdump with my code?
<MoeIcenowy>
I think directly choosing boot0 hexdump will lose some ability to make the code adaptive on more chips and frequencies
<apritzel>
MoeIcenowy: I will port my stuff on top of your V3s series anyway
<apritzel>
MoeIcenowy: ???
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<apritzel>
MoeIcenowy: I was just dumping the delay values from there
<MoeIcenowy>
apritzel: in the timing setting code there's many max(ns_to_t(x), y)
<apritzel>
MoeIcenowy: that's not the one I was talking about
<MoeIcenowy>
that's what I'm walking about.
<MoeIcenowy>
if you dump the raw values from boot0 hexdump, this timing set will theortically only suit 552MHz
<apritzel>
MoeIcenowy: I changed the SUN50I_A64_DX_READ_DELAYS and friends values
<MoeIcenowy>
oh I know it
<MoeIcenowy>
ok
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<apritzel>
MoeIcenowy: we don't know much about it, theoretically those delay values are PCB specific
<apritzel>
MoeIcenowy: so every board with a different DRAM PCB layout would need different values
<apritzel>
for instance even the Pine64+ 1GB and 2GB versions
<apritzel>
but apparently it works anyway with some one-size-fits-all settings
<MoeIcenowy>
but it's only needed for reaching *highest* performances
<apritzel>
yeah, possibly
<apritzel>
maybe one reason they run it at 672 MHz instead of the possible 800 MHz
<MoeIcenowy>
and for some (many?) boards maybe even the vendor didn't tweak it
<apritzel>
yes, I think so as well
<apritzel>
someone told me at the weekend that there are tools to automatically detect those ideal delay values
<apritzel>
but those may not be easily available
<BenG83>
as the hardware dev I am in my real life, I would not worry to much about PCB based bit delays
<tkaiser>
jelle: They received help already (from Arm AKA apritzel). But don't know what to do with it ;)
<jelle>
:)
<BenG83>
wat?
<nove>
It is a @arm.com email address, and the rules is that it count as a ARM contribution
<nove>
so the above statement made by the bananas, is technical correct
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<apritzel>
ARM (as in ARM Ltd.) does not have any "use" in BPis
<apritzel>
we have enough broken platforms already ;-)
<BenG83>
lol
<tkaiser>
nove: Sure but that's not the point. They also cheered last year when one of their boards received upstream u-boot support. But of course they still use Allwinner's 2011.09 u-boot and not mainline. That's the stuff I'm laughing about :)
<BenG83>
new Pinebook PCBs are due to arrive next week apparently
<apritzel>
tbh: I mostly pushed the BPi .dts to show how to describe eMMC support in a DT ;-)
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<apritzel>
LOL, they provide a "download link" to the .dts file
<BenG83>
download from 'google driver'
<tkaiser>
apritzel: I would guess DT for the newly released 'OPi Win' will look exactly the same
<apritzel>
yeah, though actually is even git.kernel.org
<apritzel>
tkaiser: not that that particular .dts file is anyhow useful
<apritzel>
(without the a64 .dtsi and the respective kernel drivers matching those bindings)
<KotCzarny>
and why the heck device trees have copyright?
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<KotCzarny>
is a configuration file a 'software' ? can you copyright config or device description? o.o
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<apritzel>
KotCzarny: because Dts are actually meant to be part of the firmware, tha'ts why they are dual licensed to allow easier distribution
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<apritzel>
KotCzarny: and a DT is not a Linux configuration file!
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<KotCzarny>
apritzel, in a way it is
<KotCzarny>
in simplified case you can think of it as a modprobe somemodule someconfig=somevalue
<KotCzarny>
or /etc/modprobe.d/someconfig
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<MoeIcenowy>
apritzel: I wrote a simple loop, which fills all DRAM with the address, and with 0x100000 increase per step; it seems works
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<MoeIcenowy>
apritzel: the CD issue seem to be not a stack issue -- but a MMC driver issue.
<rozpruwacz>
Hi all ! I have a question regarding the H3 device and wakeup from poweroff. I'm using nanopi neo board and after I shutdown the board with the poweroff command I can bring the board back with the onboard power button that is connected to L03 gpio pin. How can I change that pin ?
<MoeIcenowy>
after hacking sunxi_mmc_getcd, I got mainline SPL + ATF + U-Boot running on SoPine
<MoeIcenowy>
P.S. I will split out my patchset to 4: 1 for DRAM refactor, 2 for V3s no-SPL support, 3 for V3s SPL support, 4 (RFC) for SoPine support
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<rozpruwacz>
I was trying to change the script.bin and wakeup_src_para (and checked with /sys/class/script/dump to confirm changes) but the wakeup behaviour was not changed :/
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<KotCzarny>
rozpruwacz: you are talking about legacy kernel, its not supported in mainline
<rozpruwacz>
sorry, yes, i'm talking about legacy kernel. Is this wrong place to ask questions about legacy kernel ?
<apritzel>
MoeIcenowy: can you hold off with part 4) SoPine support for now?
<MoeIcenowy>
yes
<apritzel>
MoeIcenowy: and let me post what I have so far, based on your stuff?
<MoeIcenowy>
apritzel: I got the reason why it cannot boot
<apritzel>
then we can discuss this and merge it
<MoeIcenowy>
the card detect pin of SoPine is active-high
<MoeIcenowy>
not active-low
<apritzel>
MoeIcenowy: Oh, I see, I think I did FEL booting only ...
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<MoeIcenowy>
but we can now just hack it to ignore the CD pin
<MoeIcenowy>
as it's very difficult to hot-swap the TF card at least with the official base board
<BenG83>
is card detect relevant for booting?
<MoeIcenowy>
BenG83: yes, it will be used to detect whether a SD card is present, if it's set
<apritzel>
MoeIcenowy: guess why I ported my old 32-bit FEL patches :-D
<MoeIcenowy>
have wrong info there is worse than not having info there
<MoeIcenowy>
apritzel: for easier debugging?
<MoeIcenowy>
yes after removing the CD pin setting it works properly
<apritzel>
sure, but also when I realised that card swapping is even more nasty on the SoPine since you have to remove the module to insert something into the slot ...
<MoeIcenowy>
yes
<MoeIcenowy>
so we can just ignore CD pin there currently ;-)
<BenG83>
I mean I can see the issue when booting from SPI flash
<BenG83>
but if you are booting from sdcard isn't that more of a hen and egg problem?
<MoeIcenowy>
P.S. is the H5 patchset merged now?
<apritzel>
BenG83: the BROM loads the SPL and is apparently ignoring CD
<MoeIcenowy>
yes in fact we can work without CD
<MoeIcenowy>
the Lichee Pi boards do not have CD wired -- in order to save GPIOs ;-)
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<tkaiser>
Slightly off-topic: Two Armbian devs implemented DT overlays for A20/H3/H2+ boards in the meantime in our build system. Since a few knowledgeable Armbian users are reading here but not in the forum I shamelessly announce the 'call for testers' here too: https://forum.armbian.com/index.php?/topic/3787-testers-wanted-sunxi-device-tree-overlays/
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<willmore>
KotCzarny, looks interesting. That's an impressive level of integration.
<TheLinuxBug>
tkaiser: on those armada 3700 boards (ESPRESSObin) do you think it would be an issue to do power in via the molex 12v? Per http://wiki.espressobin.net/tiki-index.php?page=Block+diagram it looks like it should be possible, but wasn't sure?
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<tkaiser>
TheLinuxBug: No idea :) I'm not a hardware guy
<TheLinuxBug>
o c'mon :Z
<TheLinuxBug>
tkaiser: so what in the software side is keeping things limited to 800mhz on this board, I am assuming the dtb is responsible for defining scaling etc?
<TheLinuxBug>
was wondering where to poke as I have rebuilt the kernel already a few hundred times and haven't seen it in there
<TheLinuxBug>
currently trying to see if I can get it to recognize a pcie wifi card
<tkaiser>
TheLinuxBug: Still no idea, I don't have the hardware and all problems I ran into with other Marvell hardware that were hardware related were resolved by Solid-Run wizards indirectly (Rabeeh and Malte)
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<TheLinuxBug>
I see
<TheLinuxBug>
well the promise (on their website) that 1Ghz was avail and that 1.2 would happen
<TheLinuxBug>
but unfortunately the 4.8.4 kernel they provide seems limited to 800mhz per core
<TheLinuxBug>
My GUESS is that they are waiting for mainlin support in 4.11
<TheLinuxBug>
and maybe thats where all the fixes are held up at
<TheLinuxBug>
I am thinking they expected the mainline stuff to be avail by now
<TheLinuxBug>
weee this kernel hates ipv6 filtering
<TheLinuxBug>
had to disable it all to compile the kernel
<TheLinuxBug>
tkaiser: this thing is beautiful for network/SATA so far tested a 7200RPM 320GB 2.5" and it was getting 70MB/sec r/w and interestingly enough the NIC was should 75M/sec out by 70M/sec
<TheLinuxBug>
with iperf
<TheLinuxBug>
s/should/showing
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<beeble>
TheLinuxBug: based on the schematics from http://wiki.espressobin.net/tiki-download_file.php?fileId=90 you can power via the sata power connector. but this is only the schematics view. can't tell you if the layout would show some disadvantages l. for example only thin traces to the step downs
<beeble>
and only provide the 12v. connecting 5v too would result in reverse powering the 5v converters
<beeble>
and a reverse powered step down can result in a step up :)
<beeble>
without feedback that can go up to a lot more then 12v
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<TheLinuxBug>
beeble: thank you for that feedback, important! Is there a way to power through gpio, i need to look again, I would really like to power from atx power supply one way or other
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<TheLinuxBug>
doesn't look like it.
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